Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 4 of 4 for “"Phase jitter"”.

  1. Frequency and phase locking of a CW magnetron : with a digital phase locked loop using pushing characteristics

    … in this thesis is precise frequency and phase control of a 1.2 kW CW cooker magnetron (National 2M137) locked to a 10 MHz reference injected with a very small RF signal (of the order of -40 dBc) creating a suitable RF source for particle accelerators and other sophisticated applications. …

    lancaster Repository record for Frequency and phase locking of a CW magnetron : with a digital phase locked loop using pushing characteristics (opens in a new tab)

  2. (VDL)² : a jitter measurement built-in self-test circuit for phase locked loops

    … the (VDL)2, with the purpose of measuring jitter in IBM's phase locked loops. The (VDL)2, which stands for Variable Vernier Digital Delay Locked Line, implements both cycle-to-cycle and phase jitter measurements, by using a digital delay locked loop and a 60 stage Vernier delay line. This …

    mit Repository record for (VDL)² : a jitter measurement built-in self-test circuit for phase locked loops (opens in a new tab)

  3. Interaction of additive and quantization noises in digital PLLs

    Phase-locked loops (PLLs) are a crucial component in modern communications systems. Comprising of a phase-detector, linear filter, and controllable oscillator, they are widely used in radio receivers to retrieve the information content from remote signals. As such, they are capable of signal …

    cork Repository record for Interaction of additive and quantization noises in digital PLLs (opens in a new tab)

  4. Design and Implementation of Low Jitter Clock Generators in Communication and Aerospace System

    … clock generators are required to provide low jitter and high precision clocks in fully integrated image reject receivers and an ultra-wide tunability in time-interleaved applications. We explore several circuit design techniques and implementations of low jitter clock generator in this thesis. …

    arizona-thes Repository record for Design and Implementation of Low Jitter Clock Generators in Communication and Aerospace System (opens in a new tab)