Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

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Showing 1 to 20 of 26 for “"Performance Bottleneck"”.

  1. Design of a load-balancing architecture for parallel firewalls

    … specific protocols. This situation creates a performance bottleneck. This thesis proposes a load-balancing firewall architecture to meet the Navy's needs. It first conducts an architectural analysis of the problem and then presents a high-level system design as a solution. Finally, the thesis …

    nps Repository record for Design of a load-balancing architecture for parallel firewalls (opens in a new tab)

  2. Assessing and Improving Garbage Collection Performance in the Julia Programming Language

    … garbage collection (GC) is becoming a performance bottleneck, with reports of poor GC performance ranging from differential equation solvers to large database benchmarks. There have been several GC optimizations (such as the implementation of a generational collector) targeting the …

    mit Repository record for Assessing and Improving Garbage Collection Performance in the Julia Programming Language (opens in a new tab)

  3. Optimizing relational search with embedded neural network

    … of evaluation of partial tuple queries is the performance bottleneck of fuzzy string matching using traditional full-text index structures. We propose a solution to overcome the bottleneck by incorporating horizontally partitioned full-text indexes and an embeddable neural network classifier in …

    uoit Repository record for Optimizing relational search with embedded neural network (opens in a new tab)

  4. Design and Analysis of Hardware-Based Scheduler and Multi-Photon Quantum Cryptography Protocol

    … increases, they can potentially become the performance bottleneck in practical systems. In this dissertation, a new hardware-based scheduling algorithm is proposed for multiprocessor task scheduling. The proposed algorithm has O(1) runtime complexity and can be scaled to schedule hundreds or …

    houston Repository record for Design and Analysis of Hardware-Based Scheduler and Multi-Photon Quantum Cryptography Protocol (opens in a new tab)

  5. Software topological message aggregation techniques for large-scale parallel systems

    … of fine-grained communication is a significant performance bottleneck for many classes of applications written for large scale parallel systems. This thesis explores techniques for reducing this overhead through topological aggregation, in which fine-grained messages are dynamically combined not …

    uiuc Repository record for Software topological message aggregation techniques for large-scale parallel systems (opens in a new tab)

  6. Accelerating digital forensic searching through GPGPU parallel processing techniques

    … devices requires similar improvements to the performance of string searching techniques employed by DF tools used to analyse forensic data. As string searching is a trivially-parallelisable problem, general purpose graphic processing unit (GPGPU) approaches are a natural fit. Currently, only …

    abertay Repository record for Accelerating digital forensic searching through GPGPU parallel processing techniques (opens in a new tab)

  7. Data parallel algebraic multigrid

    … agnostic manner. Though effective we show that performance is severely limited by irregular sparse matrix operations, most notably sparse matrix-matrix multiplication. In the second phase, we address this performance bottleneck using novel techniques to optimize irregular sparse matrix …

    uiuc Repository record for Data parallel algebraic multigrid (opens in a new tab)

  8. Enabling Energy-Efficient Hybrid CMOS and Embedded Memory Accelerators for Neuromorphic Computing at the Edge

    … separation of memory and processing creates a performance bottleneck, with high energy and latency costs. This dissertation investigates hybrid CMOS–memristor accelerators that leverage non von Neumann paradigms to address these constraints. The first contribution explores computing-in-memory …

    vt Repository record for Enabling Energy-Efficient Hybrid CMOS and Embedded Memory Accelerators for Neuromorphic Computing at the Edge (opens in a new tab)

  9. Performance Tuning and Modeling of Communication in Parallel Applications

    The goal of high performance computing is executing very large problems in the least amount of time, typically by deploying parallelization techniques. However, in- troducing parallelization to an application also introduces synchronization and com- munication overhead, which in turn creates a …

    houston Repository record for Performance Tuning and Modeling of Communication in Parallel Applications (opens in a new tab)

  10. Optimizing communication bottlenecks in multiprocessor operating system kernels

    … of programming multicore processors is achieving performance that scales with the number of cores in the system. A common performance optimization is to increase inter-core parallelism. If the application is sufficiently parallelized, developers might hope that performance would scale as core …

    mit Repository record for Optimizing communication bottlenecks in multiprocessor operating system kernels (opens in a new tab)

  11. Control Flow Merging: A Compiler Transformation to Mitigate Branch Misprediction by Branch Elimination

    … path, making branch mispredictions a major performance bottleneck. Existing compiler solutions, such as outcome pre-computation and simple predication, are effective only for loop-invariant conditions or small side-effect-free branches. This work introduces Control Flow Merging (CFM), a …

    vt Repository record for Control Flow Merging: A Compiler Transformation to Mitigate Branch Misprediction by Branch Elimination (opens in a new tab)

  12. Compiler optimizations for parallel loops with fine-grained synchronization

    … and high concurrency. It has fairly consistent performance because its runtime analysis, which is usually the performance bottleneck of most runtime schemes, requires less global communication. We provide performance measurement and comparison with the schemes previously proposed. The results …

    uiuc Repository record for Compiler optimizations for parallel loops with fine-grained synchronization (opens in a new tab)

  13. Additive Manufacturing Organic Neuromorphic Devices and Neural Networks

    … on the same unit, overcoming the von Neumann performance bottleneck. Applications of OECT technology have mainly been sought after in bioelectronics, enabling human machine interfacing for smart sensing and monitoring applications in biological systems. To achieve the long-term vision of …

    cambridge Repository record for Additive Manufacturing Organic Neuromorphic Devices and Neural Networks (opens in a new tab)

  14. Unified RAW Path Oblivious RAM

    … map has huge overhead and is Path ORAM's performance bottleneck. Our technique reduces this overhead. On the practical side, we propose Unified ORAM with a position map lookaside buffer to utilize locality in real-world applications, while preserving access pattern privacy. We also propose …

    mit Repository record for Unified RAW Path Oblivious RAM (opens in a new tab)

  15. Parallelization of dynamic programming recurrences in computational biology

    … databases over the last decade has led to a performance bottleneck in the applications analyzing them. In particular, over the last five years DNA sequencing capacity of next-generation sequencers has been doubling every six months as costs have plummeted. The data produced by these …

    wustl Repository record for Parallelization of dynamic programming recurrences in computational biology (opens in a new tab)

  16. Reducing Global Memory Accesses in DNN Training using Structured Weight Masking

    … memory accesses representing a significant performance bottleneck. This thesis investigates the potential of dynamic structured weight masking to alleviate this bottleneck during training, focusing on the ResMLP architecture—a feedforward network composed exclusively of Multi-Layer …

    heid-thes Repository record for Reducing Global Memory Accesses in DNN Training using Structured Weight Masking (opens in a new tab)

  17. Representation Learning beyond Semantic Similarity: Character-aware and Function-specific Approaches

    … that representations can indeed pose a performance bottleneck. We introduce a novel approach to leveraging subword-level information in word representations: our solution lifts this bottleneck in low-resource scenarios. Finally, we introduce a novel paradigm of function-specific …

    cambridge Repository record for Representation Learning beyond Semantic Similarity: Character-aware and Function-specific Approaches (opens in a new tab)

  18. Co-Designing Efficient Systems and Algorithms for Sparse and Quantized Deep Learning Computing

    … handled by current GPU libraries, creating a performance bottleneck in AV perception. To address this, we propose TorchSparse++, a high-performance GPU system for 3D sparse convolution, achieving 1.7-3.3× speedups over state-of-the-art libraries. Additionally, we introduce BEVFusion, an …

    mit Repository record for Co-Designing Efficient Systems and Algorithms for Sparse and Quantized Deep Learning Computing (opens in a new tab)

  19. Silicon-photonics for VLSI systems

    … must scale proportionally in order to prevent a performance bottleneck. As electrical wires suffer from high channel losses, pin-count constraints, and crosstalk, they are projected to fall short of the demands required by future memory systems. Silicon-photonic optical links overcome the …

    mit Repository record for Silicon-photonics for VLSI systems (opens in a new tab)

  20. Robust structured multigrid at extreme scales

    … partial differential equations is a common performance bottleneck in scientific simulations. By exploiting structure in a problem, robust structured multigrid methods gain important performance benefits because they preserve structure throughout the multigrid hierarchy. In parallel these …

    uiuc Repository record for Robust structured multigrid at extreme scales (opens in a new tab)

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