Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 17 of 17 for “"Parallel processing (Electronic computers)"”.

  1. Novel parallel computing decoupling methods for power system distribution networks

    … for decoupling distribution power networks among parallel processing cores in a real-time (RT) multi-core environment. The proposed techniques help remove computational limitations and speedup real-time simulation of networks. Prior to this work, the solutions employed include approaches such as …

    utc Repository record for Novel parallel computing decoupling methods for power system distribution networks (opens in a new tab)

  2. A Compensated Distributed Line Decoupling approach for real time applications

    … (CDLD), to decouple distribution networks among parallel processing cores in a real-time multi-core environment. Due to the short length of distribution lines, decoupling the network for real-time processing is challenging. Previous studies proposed the Stublines and State Space Nodal (SSN) …

    utc Repository record for A Compensated Distributed Line Decoupling approach for real time applications (opens in a new tab)

  3. SIMD pipelined processor implemented on a FPGA

    … a reconfigurable system for digital signal processing or image processing applications. To do this a subset of MIPS instructions were chosen to demonstrate functionality within a five stage pipeline (instruction fetch, instruction decode, execution, memory, and write back) processor in …

    unm Repository record for SIMD pipelined processor implemented on a FPGA (opens in a new tab)

  4. VLSI implementation of digital filters

    … it is important to consider the design of the processing elements involved. The most important and demanding operation in these elements is the multiplication. Four different multipliers are designed in which the number of operations required to produce the desired result is reduced. The …

    uvic Repository record for VLSI implementation of digital filters (opens in a new tab)

  5. GPU ray tracing with CUDA

    … by developing and comparing a sequential CPU and parallel GPU implementation of a ray tracer, written in C++ and CUDA respectively. A performance analysis reveals that the optimized GPU ray tracer is capable of producing images with speedup gains up to 1852X when compared to the former CPU …

    eastern-wash Repository record for GPU ray tracing with CUDA (opens in a new tab)

  6. On diagonally structured matrix computation

    lethbridge

  7. VLSI implementation of a massively parallel wavelet based zerotree coder for the intelligent pixel array

    … been made available through the use of massively parallel processing arrays such as the Intelligent Pixel Processing Array. The Intelligent Pixel Processing array is a novel concept that integrates a parallel image capture mechanism, a parallel processing component and a parallel display component …

    edithcowan Repository record for VLSI implementation of a massively parallel wavelet based zerotree coder for the intelligent pixel array (opens in a new tab)