Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 53 for “"Parallel Architecture"”.
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Embedded machine vision - a parallel architecture approach -
… vision processing, algorithms and hardware architectures must be well matched to exploit computational parallelism. Operations can be mapped into custom functional units to achieve higher performance compared to fixed processing units. Such approaches can eliminate the necessity of employing …
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A pixel-parallel architecture for graph cuts inference
… the problem’s attractive, maximum available parallelism: Push-relabel style network flow solvers can run in parallel across every pixel of an image. In this dissertation, we describe the design and implementation of the first pixel-parallel graph cuts inference accelerator. The architecture …
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Abacus--a reconfigurable bit-parallel architecture for early vision
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.
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Cache design exploration in a general purpose massively parallel architecture
… design is a major part of any modern processor architecture. There are many design choices and tradeoffs to be considered, and these often need to be tightly coupled to the processing unit's arcitecure. The increased popularity of massively parallel architectures has motivated researchers to …
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Development of the Carpal Wrist; a Symmetric, Parallel-Architecture Robotic Wrist
… to the eight carpal bones of the human wrist, a parallel actuation scheme, similar to the flexor and extensor carpi muscles along the forearm, and an open interior passage, which forms a protected tunnel for routing hoses and electrical cables, much like the well-known carpal tunnel. The Carpal …
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A Parallel Architecture for Analog-to-Digital Conversion with Improved Dynamic Range
In this thesis, a parallel architecture for Analog-to-Digital Converters (ADCs) is developed to increase the system dynamic range. The proposed architecture is a critical component for a Continuous Wave Stepped Frequency (CWSF) radar system. Existing Commercial Off-The-Shelf (COTS) components are …
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Design and fabrication of a two degree-of-freedom hopping robot with parallel architecture using linear Lorentz-force actuators
… linear Lorentz-force actuators arranged in a parallel configuration. The decision to use linear actuators, a parallel architecture, and Lorentz-force motors was made because of distinct differences between these designs and the alternatives, notably, their lower weight, better resolution, and …
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Improved pattern growth and reconfiguration methods for a fault- tolerant cellular architecture
… has been the development of a fault tolerant parallel architecture. The main thrust of this research has been on distributing the control of the parallel architecture through the use of the ideas behind cellular automata. The control has been distributed, because having a single control unit …
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Numerical simulation of non-Newtonian fluid flow in mixing geometries
… and non-Newtonian fluids, on both sequential and parallel computer systems. The thesis begins by giving the necessary background to the mixing process and a summary of the fundamental characteristics of parallel architecture machines. This is followed by a literature review which covers …
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Compiling methods for the Fresh Breeze processor
The Fresh Breeze project is designing a new parallel architecture that is designed to serve as a model for high-performance computing while maintaining good software programming principles. One of the unique aspects of this architecture is a write-once memory model with hardware-based garbage …
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Compiler support for multiple-instruction-issue architectures
… that for conventional single-instruction-issue architectures can be achieved by multiple-instruction-issue architectures with the support of an optimizing compiler. We have constructed a full-scale C compiler that can learn the dynamic behavior of user programs by profiling, apply the profile …
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The case for reconfigurable general purpose GPU computing
… for programmers to exploit massive amounts of parallelism for relatively low costs. The abundance of GPUs in desktop and mobile computing platforms makes them ideal for accelerating tasks on multiple devices. However, despite the massively parallel architecture, GPUs are limited by the …
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Compiling array computations for the Fresh Breeze Parallel Processor
Fresh Breeze is a highly parallel architecture currently under development, which strives to provide high performance scientific computing with simple programmability. The architecture provides for multithreaded determinate execution with a write-once shared memory system. In particular, Fresh …
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Program Optimization Strategies for Data-Parallel Many-Core Processors
… for optimizing programs on a highly data-parallel architecture with fine-grained sharing of resources. I first investigate useful strategies in optimizing a suite of applications. I then introduce program optimization carving, an approach that discovers high-performance application …
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A silicon current sensing amplifier and organic imager for an optical feedback OLED display
… on a per-pixel basis using a column-parallel architecture for optical feedback to control the desired luminosity. The integrated silicon control chip and organic imager array, together with the OLED array, form a stable display. In particular, this thesis focuses on the design and …
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An I/O algorithm and a test algorithm for a reconfigurable cellular array
… general purpose computing systems, notably, parallel systems. An automatically reconfigurable, fault-tolerant, parallel architecture is suited to VLSI technology. The architecture, a uniformly interconnected array of identical cells, is capable of functional reconfiguration as well as fault …
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The Area Sampling Machine
… the thesis discuss the Area Sampling Machine, a parallel architecture designed to take advantage of the characteristics of the Area Sampling Buffer. The basic processing unit of the Area Sampling Machine is a z-buffer style scan converter. By adopting a mature technology and designing a simple …
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Real-time Visualization of Massive 3D Models on GPU Parallel Architectures
… Unit (GPU) has been praised as a massively parallel architecture not only for its significant improvements in performance but also because of its programmability for general-purpose computation. Today's GPUs allow researchers to solve problems by delivering fine-grained parallel …
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3D ICEPIC simulations of pulsed relativistic magnetron with transparent cathode : a comparative study with 3D MAGIC simulations
… were compared. ICEPIC simulations were run on a parallel architecture with 64 CPUs at a grid resolution of 1mmx 1mmy 1mmz in the 3-dimensional Cartesian coordinate system. These simulations consisted of roughly 6 million active grid cells and 16 million particles. Results indicated agreement …
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A medical image processing system based on a hybrid computer architecture
… developed system is based on parallel architecture which enables it to function at reasonable speed. The user interface has also been designed to be user friendly and, is for the most part, reasonably intuitive. In addition to the normal image processing facilities, the …
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