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Showing 1 to 9 of 9 for “"Near-threshold voltage"”.

  1. Synthesis constraint optimization for near-threshold voltage design

    Near-threshold voltage (NTV) design is a viable solution to many embedded systems which require high energy efficiencies and low performances, but it makes them vulnerable to process variation. Increasing the size of devices and/or decreasing the operating frequencies of the systems can be the …

    uiuc Repository record for Synthesis constraint optimization for near-threshold voltage design (opens in a new tab)

  2. System-level optimization of the DC-DC voltage regulator and core for sub/near-threshold voltage operation

    Switched capacitor voltage regulator module (SC-VRM) is suitable for low power embedded systems operating in near/sub-threshold region due to its high conversion ratio and compactness. However, existing optimization for SC-VRM is separated from the embedded core design and therefore leads to …

    uiuc Repository record for System-level optimization of the DC-DC voltage regulator and core for sub/near-threshold voltage operation (opens in a new tab)

  3. Novel many-core architectures for energy-efficiency

    Ideal CMOS device scaling relies on scaling voltages down with lithographic dimensions at every technology generation. This gives rise to faster circuits due to higher frequency and smaller silicon area for the same functionality. The dynamic power density - equivalently, dynamic power, if the chip …

    uiuc Repository record for Novel many-core architectures for energy-efficiency (opens in a new tab)

  4. An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline

    … low as to allow the efficiency gains of near threshold voltage operation. Performance is there- fore dependant on exploiting a new degree of fine-grained parallelism such as is currently only found in GPGPUs, but in a manner that is not as restrictive in application domain range. While …

    cape-town Repository record for An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline (opens in a new tab)

  5. Design of robust ultra-low power platform for in-silicon machine learning

    … stochastic fabrics (e.g., CMOS operating in near-threshold voltage or voltage overscaling, and beyond CMOS devices). This dissertation presents the Compute VRM (C-VRM) to embed the information processing into the energy delivery subsystem. The C-VRM employs multiple voltage domain stacking …

    uiuc Repository record for Design of robust ultra-low power platform for in-silicon machine learning (opens in a new tab)

  6. Assessing Approximate Arithmetic Designs in the presence of Process Variations and Voltage Scaling

    … increasing from 6psec to 12psec, and when the voltage is scaled to Near-Threshold-Voltage (NTV) levels sigma increases by up to 5psec. Approximate Arithmetic Units were not affected greatly by the change in distribution of the thickness of the gate oxide. Even when considering the 3-sigma …

    ucf

  7. Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs

    … we leverage the benefits of aggressive voltage scaling (VS) for obtaining energy efficiency while compensating for the loss in performance by exploiting parallelism present in various DSP designs. We demonstrate this proposed methodology consumes 8% - 77% less power as compared to simple …

    vt Repository record for Variation Aware Energy-Efficient Methodologies for Homogeneous Many-core Designs (opens in a new tab)

  8. Energy-efficient systems for information transfer and processing

    … architecture for CNN capable of operating in near threshold voltage (NTV) regime for aggressive energy efficiency. It is well-known that NTV computing can achieve up to 10\times energy savings but is sensitive to process, temperature, and voltage (PVT) variations which can lead to timing …

    uiuc Repository record for Energy-efficient systems for information transfer and processing (opens in a new tab)

  9. Design of energy-efficient high-speed wireline transceiver

    … proposed transceiver employs aggressive supply voltage scaling, and multiplexed transmitter and receiver synchronized by low-rate multi-phase clocks are adopted to achieve high data rate even at a supply voltage close to the device threshold voltage. Phase spacing errors resulting from device …

    uiuc Repository record for Design of energy-efficient high-speed wireline transceiver (opens in a new tab)