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Showing 1 to 7 of 7 for “"Multiprocessor system-on-chip"”.

  1. Heterogeneous multiprocessor pipeline design for H.264 video encoder

    MultiProcessor System on Chip (MPSoC) architecture has been widely researched for the implementation of video coding applications due to its ability to process data in parallel, its flexibility, high performance, and low cost. However, in recent times, with the release of more complex video coding …

    unsw Repository record for Heterogeneous multiprocessor pipeline design for H.264 video encoder (opens in a new tab)

  2. Investigation into low power and reliable system-on-chip design

    It is likely that the demand for multiprocessor system-on-chip (MPSoC) with low power consumption and high reliability in the presence of soft errors will continue to increase. However, low power and reliable MPSoC design is challenging due to conflicting trade-off between power minimisation and …

    soton Repository record for Investigation into low power and reliable system-on-chip design (opens in a new tab)

  3. Compilation and Scheduling Techniques for Embedded Systems

    Embedded applications are constantly increasing in size, which has resulted in increasing demand on designers of digital signal processors (DSPs) to meet the tight memory, size and cost constraints. With this trend, memory requirement reduction through code compaction and variable coalescing …

    lsu-thes Repository record for Compilation and Scheduling Techniques for Embedded Systems (opens in a new tab)

  4. Implementation of coarse-grain coherence tracking support in ring-based multiprocessors

    As the number of processors in multiprocessor system-on-chip devices continues to increase, the complexity required for full cache coherence support is often unwarranted for application-specific designs. Bus-based interconnects are no longer suitable for larger-scale systems, and the logic and …

    queens Repository record for Implementation of coarse-grain coherence tracking support in ring-based multiprocessors (opens in a new tab)

  5. Next-generation safety-critical systems using COTS based homogeneous multi-core processors and heterogeneous MPSoCS

    The embedded computing revolution is pushing the transition from a single-core processor to a multicore processor where multiple single-core processors are packed into a single chip. With recent hardware advancements and the evolution of new challenging applications in autonomy such as self-driving …

    uiuc Repository record for Next-generation safety-critical systems using COTS based homogeneous multi-core processors and heterogeneous MPSoCS (opens in a new tab)

  6. A mesh architecture for data management of matrix computations.

    Using super-resolution techniques to estimate the direction that a signal arrived at a radio receiver; Tracking moving targets using particle filters; Applying advanced coding techniques to radio transmissions. Real-world applications like these rely on high-speed matrix computations. Although the …

    adelaide Repository record for A mesh architecture for data management of matrix computations. (opens in a new tab)

  7. MULTI-SCALE SCHEDULING TECHNIQUES FOR SIGNAL PROCESSING SYSTEMS

    … signal processing has emerged, from distributed systems such as Wireless Sensor Networks (WSNs) to parallel systems such as Multicore Programmable Digital Signal Processors (PDSPs), Multicore General Purpose Processors (GPPs), and Graphics Processing Units (GPUs) to heterogeneous combinations of …

    maryland Repository record for MULTI-SCALE SCHEDULING TECHNIQUES FOR SIGNAL PROCESSING SYSTEMS (opens in a new tab)