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Showing 1 to 20 of 217 for “"Multiprocessor"”.

  1. SYNERGISTIC COMPUTING ON HETEROGENEOUS MULTIPROCESSOR

    WANG SIQI2019

    … unleash the full potential of the heterogeneous multiprocessors towards high-performance energy-efficient mobile computing.

    nus Repository record

  2. Further Results Regarding Multiprocessor Systems

    Chang, Donald Yi-ChungUniversity of Illinois at Urbana-Champaign2014

    Made available in DSpace on 2014-12-13T18:02:02Z (GMT). No. of bitstreams: 1 7811220.pdf: 7536278 bytes, checksum: ab69a6ecca137bd5a906571fc29fdd8f (MD5) Previous issue date: 1978

    uiuc Repository record

  3. A Multiprocessor for Simulation Applications

    Davis, Edward Willmore, Jr.University of Illinois at Urbana-Champaign2014

    Made available in DSpace on 2014-12-10T20:13:38Z (GMT). No. of bitstreams: 1 7317176.pdf: 6259087 bytes, checksum: 4d9fda4c0b3c2e1afa6f13cd1eafaca0 (MD5) Previous issue date: 1972

    uiuc Repository record

  4. Multiprocessor communications: Design and technology

    Hsu, Tsun-yukUniversity of Illinois at Urbana-Champaign2011

    The performance evaluation of multiprocessor interconnects cannot be divorced from issues of traffic modeling and implementational constraints. In this dissertation, we examine these issues and present new perspectives of various aspects of network design. We first concentrate on the problems that …

    uiuc Repository record

  5. PROTEUS, a microprogrammable, multiprocessor computer

    Kesselman, Joseph JayMassachusetts Institute of Technology1982

    Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982.

    mit Repository record

  6. On multiprocessor synchronization and data transfer

    Su, Hong-MenUniversity of Illinois at Urbana-Champaign2011

    … communication on distributed shared memory multiprocessors for critical region synchronization, a family of information dissemination algorithms (such as data spreading and dissemination barriers), and Doacross loops. The mechanism is able to remove three major interprocessor communication …

    uiuc Repository record

  7. Multiprocessor sparse SVD algorithms and applications

    Berry, Michael WaitselUniversity of Illinois at Urbana-Champaign2011

    … (SVD) of large sparse matrices on a multiprocessor architecture. We particularly consider the SVD of unstructured sparse matrices in which the number of rows may be substantially larger or smaller than the number of columns. On vector machines, considerable progress has been made over …

    uiuc Repository record

  8. Practical Time Travel of Multiprocessor Systems

    Montesinos Ortego, PabloUniversity of Illinois at Urbana-Champaign2009

    … need tools, models, and architectures that make multiprocessors more programmable. One compelling way to improve programmability is to enable back-and-forth time travel of multiprocessor execution. Such ability simplifies parallel code debugging, and is possible using a technique called …

    uiuc Repository record

  9. A high performance multiprocessor DSP system

    Hiers, Todd C. (Todd Christopher), 1979-Massachusetts Institute of Technology2001

    Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.

    mit Repository record

  10. Two approaches to multiprocessor memory-system simulation

    Over, Andrew James2008

    aus-cath Repository record

  11. Two approaches to multiprocessor memory-system simulation

    Over, Andrew James2008

    anu Repository record

  12. Performance Modeling of Multiprocessor Systems With Paging

    Gant, Alan DaleUniversity of Illinois at Urbana-Champaign2014

    … to describe the performance of a wide range of multiprocessor system configurations and workloads. This model deals specifically with P tightly-coupled, identical processors with shared primary and secondary memory. Secondary memory consists of a paging drum with S sectors. The workload consists …

    uiuc Repository record

  13. Exploiting multiprocessor memory hierarchies for operating systems

    Xia, ChunUniversity of Illinois at Urbana-Champaign2011

    … and optimization of the performance of multiprocessor memory hierarchies for operating systems. The operating system instruction cache misses are reduced by 81% using a code reorganization scheme tailored to the operating system, guarded sequential prefetching, and stream buffers. The …

    uiuc Repository record

  14. Simulation of CACHET on a multiprocessor computer

    Sarkar, Andrew Michael, 1975-Massachusetts Institute of Technology2000

    Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.

    mit Repository record

  15. A multiprocessor implementation for the GSM algorithm

    Kleiman, Jennifer C. (Jennifer Carey), 1976-Massachusetts Institute of Technology1999

    Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.

    mit Repository record

  16. Micro benchmarks for multiprocessor memory hierachy performance

    Hristea, Cristina-Ana-MariaMassachusetts Institute of Technology1997

    Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.

    mit Repository record

  17. Structure driven multiprocessor compilation of numeric problems

    Prasanna, Gorur Narayana SrinivasaMassachusetts Institute of Technology1991

    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1991.

    mit Repository record

  18. Implementation of a general purpose dataflow multiprocessor

    Papadopoulos, Gregory M. (Gregory Michael)Massachusetts Institute of Technology1988

    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1988.

    mit Repository record

  19. The design of a multiprocessor development system

    Anderson, Thomas LeeMassachusetts Institute of Technology1982

    Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982.

    mit Repository record

  20. Concurrency control for multiprocessor event-driven systems

    Zeldovich, Nickolai, 1981-Massachusetts Institute of Technology2002

    Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2002.

    mit Repository record

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