Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 49 for “"Multicore processors"”.
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Flexible memory protection for multicore processors
A system’s memory access control mechanisms profoundly impact the performance, reliability, security, and composability of the software it runs. Desirable features of an access control mechanism include: the ability to grant arbitrary permissions on any region of memory to any thread in the system; …
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Shared Memory Abstractions for Heterogeneous Multicore Processors
… are therefore experimenting with a variety of multicore processor designs. Heterogeneous multicore processors with Explicitly Managed Memory (EMM) hierarchies are one such experimental design which has the potential for high performance, but at the cost of great programmer effort. EMM …
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Locality-aware cache hierarchy management for multicore processors
Next generation multicore processors and applications will operate on massive data with significant sharing. A major challenge in their implementation is the storage requirement for tracking the sharers of data. The bit overhead for such storage scales quadratically with the number of cores in …
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Cycle-accurate modeling of multicore processors on FPGAs
… target design. We describe Arete, a full-system multicore processor simulator, developed using our modeling methodology. We provide details on Arete's resource-efficient and high-performance implementation on multiple FPGA platforms, and the architectural experiments performed using it. We …
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Operating System Management of Shared Caches on Multicore Processors
… should manage the on-chip shared caches of multicore processors for the purposes of achieving performance gains. Consequently, this dissertation demonstrates how the operating system can profitably manage these shared caches. Two shared-cache management principles are investigated: (1) …
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Efficient execution of fine-grained actors on multicore processors
… programming new computing platforms such as the multicores and cloud computers, primarily due to features such as inherent concurrency and isolation of state. However, the model is often perceived to be fundamentally inefficient on stock multicore processors. Consequently, we find that standard …
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The scalable commutativity rule : designing scalable software for multicore processors
What fundamental opportunities for multicore scalability are latent in software interfaces, such as system call APIs? Can scalability opportunities be identified even before any implementation exists, simply by considering interface specifications? To answer these questions this dissertation …
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Vector support for multicore processors with major emphasis on configurable multiprocessors
… to realize a new architecture design paradigm. Multicore processor design is the result of this trend. It has proven quite capable in performance increase and provides new opportunities in power management and system scalability. But current multicore processors do not provide powerful vector …
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High Performance Sequential Execution In Fine-Grain Multicore Processors Via Core Aggregation
This dissertation presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, or they can be used as distinct processing elements, as needed at run time by applications. Core fusion improves …
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Intra- and Inter-chip Communication Support for Asymmetric Multicore Processors with Explicitly Managed Memory Hierarchies
The use of asymmetric multi-core processors with on-chip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise applications. The focus of current research has been on making efficient use of individual systems, and porting …
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HAsim : cycle-accurate multicore performance models on FPGAs
… cycle-accurate performance modeling of multicore processors using FPGAs. Contributions include a distributed technique controlling simulation on a highly-parallel substrate, hardware design techniques to reduce development effort, and a specific framework for modeling shared-memory …
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TIME-PREDICTABLE FAST MEMORIES: CACHES VS. SCRATCHPAD MEMORIES
… the shared L2 cache used by different cores on multicore processors. Thus, it can significantly increase the complexity of worst-case execution time (WCET) analysis, which is crucial for real-time systems. This dissertation designs several time-predictable scratchpad memory (SPM) based …
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A real-time scratchpad-centric OS for multi-core embedded systems
Multicore processors have been increasing in development by the industry to meet the ever-growing processing requirements of various applications because these processors offer benefits such as reduced power consumption, more processing power and efficient parallel task execution for general …
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Timing analysis in existing and emerging cyber physical systems
… and/or the environment. Over the past decade, multicore processors have become increasingly common for their potential of efficiency, which has made new single-core processors become relatively scarce. As a result, it has created a pressing need to transition to multicore processors. However, …
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Concurrent gate-level circuit simulation
In the last several years, parallel computing on multicore processors has transformed from a niche discipline relegated primarily to scientific computing into a standard component of highperformance personal computers. At the same time, simulating processors prior to manufacture has become …
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Vector coprocessor sharing techniques for multicores: performance and energy gains
Vector Processors (VPs) created the breakthroughs needed for the emergence of computational science many years ago. All commercial computing architectures on the market today contain some form of vector or SIMD processing. Many high-performance and embedded applications, often dealing with streams …
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Scalable memory management using a distributed buddy allocator
The recent rise of multicore processors has forced us to reexamine old computer science problems in a new light. As multicores turn into manycores, we need to visit these problems yet again to find solutions that will work on these drastically different architectures. This thesis presents the …
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A 9GHz injection locked loop optical clock receiver in 32-nm CMOS
The bottleneck of multi-core processors performance will be the I/O, for both on-chip core-to-core I/0, and off-chip core-to-memory. Integrated silicon photonics can potentially provide high-bandwidth low-power signal and clock distribution for multicore processors, by exploiting …
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Energy scalability of on-chip interconnection networks
… backbone in multiprocessor systems-on-a-chip, multicore processors, and tiled processors. OCNs consume significant portions of a chip's energy budget, so their energy analysis early in the design cycle becomes important for architectural design decisions. Although innumerable studies have …
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A hybrid static/dynamic approach to scheduling stream programs
… to write stream programs that execute on multicore processors. Stream programs consist of actors that operate on streams of data. To execute on multiple cores, actors are scheduled for parallel execution while satisfying data dependencies between actors. In StreamIt, the compiler analyzes …
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