Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 20 of 23 for “"Multicore Architectures"”.

  1. Compiler Cost Model for Multicore Architectures

    The intention to move from single core to multicore architectures has been to increase the performance of a system and hence increase the performance of an application. However, obtaining the optimal application performance on multicore architectures is found to be not that trivial and still …

    houston Repository record for Compiler Cost Model for Multicore Architectures (opens in a new tab)

  2. Hybrid coherence for scalable multicore architectures

    Made available in DSpace on 2011-01-14T22:43:29Z (GMT). No. of bitstreams: 2 Kelm_John.pdf: 2626023 bytes, checksum: 069d102e87802f19ba796da9758e8be9 (MD5) license.txt: 4057 bytes, checksum: 83ce7b997e74195078c3d8fca669fdd2 (MD5)

    uiuc Repository record for Hybrid coherence for scalable multicore architectures (opens in a new tab)

  3. POWER-AWARE PERFORMANCE OPTIMIZATION ON MULTICORE ARCHITECTURES

    … a metric to determine core criticality. In multicore processing, certain threads/cores wait for other threads due to synchronization. Our proposed method combines Instructions Per Cycle (IPC) of a thread and the sum of IPCs of all co-running threads within a time quanta. We present a low …

    siu-theses Repository record for POWER-AWARE PERFORMANCE OPTIMIZATION ON MULTICORE ARCHITECTURES (opens in a new tab)

  4. On the Factor Refinement Principle and its Implementation on Multicore Architectures

    … subproblems, etc. to fully exploit modern multicore architectures. The Cilk++ implementation of our parallel algorithm based on the augment refinement principle of Bach, Driscoll and Shallit achieves linear speedup for input data of sufficiently large size.

    uwo Repository record for On the Factor Refinement Principle and its Implementation on Multicore Architectures (opens in a new tab)

  5. Compiler techniques for scalable performance of stream programs on multicore architectures

    Given the ubiquity of multicore processors, there is an acute need to enable the development of scalable parallel applications without unduly burdening programmers. Currently, programmers are asked not only to explicitly expose parallelism but also concern themselves with issues of granularity, …

    mit Repository record for Compiler techniques for scalable performance of stream programs on multicore architectures (opens in a new tab)

  6. On the Interaction of High-Performance Network Protocol Stacks with Multicore Architectures

    Multicore architectures have been one of the primary driving forces in the recent rapid growth in high-end computing systems, contributing to its growing scales and capabilities. With significant enhancements in high-speed networking technologies and protocol stacks which support these high-end …

    vt Repository record for On the Interaction of High-Performance Network Protocol Stacks with Multicore Architectures (opens in a new tab)

  7. Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling

    … semantics-preserving implementation on multicore architectures with partitioned fixed-priority scheduling. In this thesis, we propose to judiciously assign task offset, task priority, and task communication mechanism, to avoid simultaneous access to shared memory by tasks on different …

    vt Repository record for Optimal Implementation of Simulink Models on Multicore Architectures with Partitioned Fixed Priority Scheduling (opens in a new tab)

  8. Scalable and Energy Efficient Execution Methods for Multicore Systems

    Multicore architectures impose great pressure on resource management. The exploration spaces available for resource management increase explosively, especially for large-scale high end computing systems. The availability of abundant parallelism causes scalability concerns at all levels. Multicore

    vt Repository record for Scalable and Energy Efficient Execution Methods for Multicore Systems (opens in a new tab)

  9. Graphite : a parallel distributed simulator for multicores

    … distributed simulator for simulating large-scale multicore architectures, and focuses particularly on the functional aspects of simulating a single, unmodified multi-threaded application across multiple machines. Graphite allows fast simulation of multicore architectures by leveraging …

    mit Repository record for Graphite : a parallel distributed simulator for multicores (opens in a new tab)

  10. Next-generation safety-critical systems using COTS based homogeneous multi-core processors and heterogeneous MPSoCS

    … the transition from a single-core processor to a multicore processor where multiple single-core processors are packed into a single chip. With recent hardware advancements and the evolution of new challenging applications in autonomy such as self-driving cars and unmanned aerial vehicles (UAVs), …

    uiuc Repository record for Next-generation safety-critical systems using COTS based homogeneous multi-core processors and heterogeneous MPSoCS (opens in a new tab)

  11. On the Interoperability of Programming Languages based on the Fork-Join Parallelism Model

    … for concurrency platforms targeting multicore architectures. First of all, MetaFork is a multithreaded language based on the fork-join model of concurrency: it allows the programmer to express parallel algorithms assuming that tasks are dynamically scheduled at run-time. While …

    uwo Repository record for On the Interoperability of Programming Languages based on the Fork-Join Parallelism Model (opens in a new tab)

  12. Shared Memory Abstractions for Heterogeneous Multicore Processors

    … are therefore experimenting with a variety of multicore processor designs. Heterogeneous multicore processors with Explicitly Managed Memory (EMM) hierarchies are one such experimental design which has the potential for high performance, but at the cost of great programmer effort. EMM …

    vt Repository record for Shared Memory Abstractions for Heterogeneous Multicore Processors (opens in a new tab)

  13. Efficient Algorithms And Optimizations For Scientific Computing On Many-Core Processors

    … efficient algorithms for many-core and multicore architectures requires using different strategies to allow for the best exploitation of the hardware resources on those architectures. Researchers have ported many scientific applications to modern many-core and multicore parallel …

    wayne-thes Repository record for Efficient Algorithms And Optimizations For Scientific Computing On Many-Core Processors (opens in a new tab)

  14. Tunable WCET for hard real-time multicore system

    In recent years, multicore processors have been receiving a significant amount of attention from avionic and automotive industries as the demand for high-end real-time applications drastically increases. However, the unpredictable worst-case timing behavior that mainly arises from shared resource …

    uiuc Repository record for Tunable WCET for hard real-time multicore system (opens in a new tab)

  15. Evolve : a preliminary multicore architecture for Introspective Computing

    … The Partner Cores framework builds upon tiled multicore architectures [11, 10, 25, 9], closely coupling cores such that one may be used to observe and optimize execution in another. Partner cores incrementally collect and analyze execution traces from code cores then exploit knowledge of the …

    mit Repository record for Evolve : a preliminary multicore architecture for Introspective Computing (opens in a new tab)

  16. Identifying, Quantifying, Extracting and Enhancing Implicit Parallelism

    The shift of the microprocessor industry towards multicore architectures has placed a huge burden on the programmers by requiring explicit parallelization for performance. Implicit Parallelization is an alternative that could ease the burden on programmers by parallelizing applications “under the …

    uiuc Repository record for Identifying, Quantifying, Extracting and Enhancing Implicit Parallelism (opens in a new tab)

  17. Dynamic Feedback-Driven Thread Migration for Energy-Efficient Execution of Multithreaded Workloads

    Multicore architectures require sound thread to core mapping policies in order to exploit the efficiency and parallelism that multi-threaded programs offer. Traditionally, the operating system scheduler focuses on temporal aspects of performance such as execution time and latency, disregarding …

    texas-state Repository record for Dynamic Feedback-Driven Thread Migration for Energy-Efficient Execution of Multithreaded Workloads (opens in a new tab)

  18. TIME-PREDICTABLE FAST MEMORIES: CACHES VS. SCRATCHPAD MEMORIES

    In modern processor architectures, caches are widely used to shorten the gap between the processor speed and memory access time. However, caches are time unpredictable, especially the shared L2 cache used by different cores on multicore processors. Thus, it can significantly increase the complexity …

    siu-theses Repository record for TIME-PREDICTABLE FAST MEMORIES: CACHES VS. SCRATCHPAD MEMORIES (opens in a new tab)

Page 1 of 2