Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
Results
Showing 1 to 20 of 106 for “"Memory Usage"”.
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Multifractal analysis of memory usage patterns
… study is to apply fractal analysis to computer memory usage patterns. We devise methods for calculating the Holder exponent of a time series and calculating the fractal dimension of a plot of a time series. These methods are then applied to memory-related data collected from a Unix server. We …
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Analysis of memory usage in a LaserJet printer
Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
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Low-Level Static Analysis for Memory Usage and Control Flow Recovery
Formal characterization of the memory used by a program is an important basis for security analyses, compositional verification, and identification of noninterference. However, soundly proving memory usage requires operating on the assembly level due to the semantic gap between high-level languages …
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Minimax sampling for key agreement generation in body sensor networks
The objective of the research was to optimize memory usage in body sensor network (BSN) nodes during key agreement generation. In BSNs, it is important to secure communication between BSN nodes to ensure confidentiality, authenticity, and integrity of the information. The BSN node is faced with …
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Boundless Fluids Using the Lattice-Boltzmann Method
… current LBM simulations also suffer from high memory usage and restrict free surface fluids to domains of fixed size. This thesis modifies the LBM to utilize a recursive run-length-encoded (RLE) grid data structure instead of the standard fixed array of grid cells, which reduces the amount of …
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Machine-independent parallel execution of speculative computations
… with the addition of processors. The memory usage of these search techniques does not increase proportionately with the increase in the number of processors. A parallel execution scheme for speculative computations in pure state-space search that associates bit-vector priorities with …
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Optimizing interactive analytics engines for heterogeneous clusters
… improves the tail latency by 18% and reduces memory usage by up to 27% (2-3X improvement over Scarlett). In presence of stragglers, Getafix-H improves tail latency by 55% and reduces memory usage by upto 20% compared to Getafix. Getafix-H enables sysadmins to auto-tier a heterogeneous cluster …
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Analysis of periodic structures using finite-difference time-domain method
… in terms of both computational time and memory usage. In addition, an efficient hybrid FDTD generalized scattering matrix (GSM) technique is developed to analyze multilayer periodic structure. The technique is based on the FDTD constant horizontal wavenumber approach to compute the …
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Use of Improved Far -Field Boundary Conditions to Compute External Flows on Reduced Domains
… present approach are demonstrated by comparing memory usage and runtime for solutions of comparable accuracy. When the system of nonlinear algebraic equations is solved by Newton iteration, memory usage and runtime are reduced by about 70% compared to computations using Neumann and free-stream …
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GridSLAM on the RAPTOR autonomous vehicle
… shared, and lazy data structures to reduce memory usage and computation requirements.
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An empirical study of a novel technique : rationed-memory compiling
We present rationed-memory compiling, a new technique designed to reduce the memory consumption of programs. The technique lowers memory usage by decreasing the amount of memory that programs allocate, but not use actively. With rationed- memory compiling, whenever a program requests a memory …
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Design and Evaluation of a Data-distributed Massively Parallel Implementation of a Global Optimization Algorithm---DIRECT
… vs.\ exploitation) goals. Enhanced with a memory reduction technique, dynamic data structures are used to organize local data, handle unpredictable memory requirements, reduce the memory usage, and share the data across multiple processors. The parallel scheme employs a multilevel …
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Performance of Algebraic Multigrid for Parallelized Finite Element DNS/LES Solvers
… GMRES; and on two supercomputers of different memory architecture(distributed and shared memory). This study revealed Fourier space partitioning outperforms physical space partitioning in all problems analyzed, and scales more efficiently as well. These differences were more dramatic on the …
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Efficient Algorithms and Systems for Tiny Deep Learning
… models to MCUs is challenging due to the limited memory size: the memory of microcontrollers is 2-3 orders of magnitude smaller even than mobile phones. In this thesis, we study efficient algorithms and systems for tiny-scale deep learning. We propose MCUNet, a framework that jointly designs the …
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Defeating code reuse attacks with minimal tagged architecture
… aim to guarantee security while minimizing tag memory usage. Our Taxi prototype, a modified RISC-V ISA simulator, demonstrates that we can defeat code reuse attacks with high compatibility and low memory overhead.
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A practical and efficient algorithm for the k-mismatch shortest unique substring finding problem
… providers, it is likely that trading additional memory usage for significantly improved processing times will be desirable and needed by many users. For example, the best prior solution may require years to process a 200MB DNA sample for any k > 0, while this new proposal, using 24 cores, …
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Taming TinyML: deep learning inference at computational extremes
… advances the predictive performance vs resource usage trade-off of neural networks compared to prior work. The novel methodology spans the domains of model compression, neural architecture search (NAS) and software-level execution optimisation. Firstly, I present μNAS, an evolutionary …
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A Software Defined Radio Implemented using the OSSIE Core Framework Deployed on a TI OMAP Processor
… radios. This report presents measurements of memory and processor usage for a Software Communication Architecture (SCA) waveform running on an OMAP starter kit and a desktop PC. The process used to build software, originally targeted for a desktop computer, on an embedded machine with a …
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Loop Transformations for the Optimized Generation of Reconfigurable Hardware
… data-intensive applications on heterogeneous-memory systems; they rather focus on parallelism. This thesis addresses the memory hierarchy problem to high-level transformations of loop structures. The composition of long transformation sequences by combining shorter subsequences is studied …
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