Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 27 for “"Memory Protection"”.
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Mondriaan memory protection
… of society. Hardware-enforced, fine-grained memory protection can increase the reliability and security of computer systems, but will be adopted only if the protection mechanism does not compromise performance, and if the hardware mechanism can be used easily by existing software. Mondriaan …
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Flexible memory protection for multicore processors
A system’s memory access control mechanisms profoundly impact the performance, reliability, security, and composability of the software it runs. Desirable features of an access control mechanism include: the ability to grant arbitrary permissions on any region of memory to any thread in the system; …
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Capability Memory Protection for Embedded Systems
… embedded systems, to address existing memory safety and task isolation problems as well as providing new means to design a secure and scalable real-time system. In addition, this dissertation looks into how practical and high-performance temporal memory safety can be achieved under a …
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TRUSTED RUNTIME ENVIRONMENTS FOR EMBEDDED SYSTEMS: FROM MEMORY PROTECTION TO SECURE VIRTUALIZATION
… constrained by limited computational and memory resources. This thesis addresses these challenges by proposing lightweight, scalable mechanisms for runtime memory protection and secure execution, with an emphasis on minimizing device overhead through remote verification. To strengthen …
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Architectural Support for Protecting Memory Integrity and Confidentiality
… secure processor and cryptographic memory protection model that will strength security of a computing system. The thesis proposes certain cryptographic and security features integrated into the general purpose processor and computing platform to protect confidentiality and integrity …
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Complete spatial safety for C and C++ using CHERI capabilities
Lack of memory safety in commonly used systems-level languages such as C and C++ results in a constant stream of new exploitable software vulnerabilities and exploit techniques. Many exploit mitigations have been proposed and deployed over the years, yet none address the root issue: lack of memory …
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Acetone : a system call interface for Asbestos labels
… in the same address space, but have different memory access privileges. Acetone uses standard memory protection mechanisms to ensure that all memory accesses are consistent with label rules. The performance results show that these checks have a relatively low cost.
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Explicit Software Speculation for Dynamic Language Runtimes
… additional hardware support for fine-grain memory protection.
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The Systematic Design of a Protection Mechanism to Support a High Level Language
The protection structures of most computers in commercial use today are the results of a haphazard design process. This work represents an attempt to correct this state of affairs by integrating a wide variety of previous work in the areas of programming language design, memory protection, and …
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Memory-safe microcontroller applications with the Bedrock structured programming system
… However, microcontrollers generally lack the memory protection common in desktop processors, so memory safety must come through other means. One such mechanism is Bedrock, a library for the Coq proof assistant that applies separation logic to a small c-like language, allowing programmers to …
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Preserving Memory Safety in Safe Rust during Interactions with Unsafe Languages
… by other programming languages using Intel’s Memory Protection Key (MPK) technology. We demonstrate both the effectiveness and efficiency of Galeed on Firefox, a web browser written in Rust and C++.
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Verified security properties for the capability-enhanced CHERI-MIPS architecture
… abstractions provide only coarse-grained memory protection, which lets these small bugs escalate to serious security vulnerabilities. CHERI, the context of our work, is an ongoing research project that addresses the second problem with hardware support for fine-grained memory protection …
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Secure and Efficient In-Process Monitor and Multi-Variant Execution
… hardware assisted in-process monitor protection system utilizing Intel Memory Protection Keys (MPK) to enforce execute-only memory, combined with code randomization and runtime binary patching to effectively protect and hide in-process monitors. Next, we introduce L-MVX, a flexible …
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POSEIDON: The First Safe and Scalable Persistent Memory Allocator
With the advent of byte-addressable Non-Volatile Memory (NVMM), the need for a safe, scalable and high-performing memory allocator is inevitable. A slow memory allocator can bottleneck the entire application stack, while an unsecure memory allocator can render underlying systems and applications …
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Ribbons: A Partially Shared Memory Programming Model
… mechanisms exist for efficient isolation of heap memory. This dissertation develops a new memory programming model known as ribbons to enable fine-grained isolation of heap memory. Ribbons is a shared memory programming model that allows for more implicit sharing of memory than multiprocessing yet …
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Impact of Increased Cache Misses on Runtime Performance of MPX-enabled Programs
… provide high performance and direct control over memory management. But these languages are prone to memory safety violations. Intel introduced a new ISA extension-Memory Protection Extension(MPX), a hardware-assisted full-stack solution, to protect against the memory safety violations. While MPX …
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High-performance memory safety - Optimizing the CHERI capability machine
… extension for security, supporting fine-grained memory protection through hardware-enforced capabilities. The original CHERI model uses 256-bit capabilities to carry information required for various checks helping to enforce memory safety, leading to increased memory bandwidth requirements and …
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Improved Kernel Security Through Code Validation, Diversification, and Minimization
… This control includes the ability to disable protection mechanisms and hide evidence of compromise.</p> <p>The lack of diversity in commodity, general-purpose operating systems enables attackers to craft a single kernel exploit that has the potential to infect millions of hosts. If enough …
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Memory safety with CHERI capabilities: security analysis, language interpreters, and heap temporal safety
… is a promising research processor-architecture protection model that facilitates memory safety and fine-grained compartmentalization for software. The architecture has reached a mature state and been integrated into Arm’s industrial-scale Morello system-on-chip, a large corpus of software has …
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Monitoring immune dynamics following infection and vaccination using B cell receptor sequencing
… signatures and genetic determinants of immune memory, protection and response to re-exposure. As part of my PhD I developed and optimised a method for high-resolution profiling of B cell receptor (BCR) immune repertoires based on the barcoded sequencing of the human immunoglobulin genes. The …
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