Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 8 of 8 for “"MTNCL"”.

  1. CAD Tool Design for NCL and MTNCL Asynchronous Circuits

    … power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty compared to the all low-Vt implementation, and …

    arkansas Repository record for CAD Tool Design for NCL and MTNCL Asynchronous Circuits (opens in a new tab)

  2. Design and Analysis of an Asynchronous Microcontroller

    … presents the design of the most complex MTNCL circuit to date. A fully functional MTNCL MSP430 microcontroller is designed and benchmarked against an open source synchronous MSP430. The designs are compared in terms of area, active energy, and leakage energy. Techniques to reduce MTNCL

    arkansas Repository record for Design and Analysis of an Asynchronous Microcontroller (opens in a new tab)

  3. Asynchronous 3D (Async3D): Design Methodology and Analysis of 3D Asynchronous Circuits

    … Convention Logic (NCL) and Multi-Threshold NCL (MTNCL). It presents the Async3D tool flow and library for NCL and MTNCL 3D ICs. It also analyzes NCL and MTNCL circuits in 3D IC. Several FIR filter designs were implement in NCL, MTNCL, and synchronous architecture to compare synchronous and …

    arkansas Repository record for Asynchronous 3D (Async3D): Design Methodology and Analysis of 3D Asynchronous Circuits (opens in a new tab)

  4. Non-Volatile Memory Adaptation in Asynchronous Microcontroller for Low Leakage Power and Fast Turn-on Time

    … using Multi-Threshold NULL Convention Logic (MTNCL) methodology combined with an asynchronous non-volatile magnetic random-access-memory (RAM) to achieve low leakage power and fast turn-on. This asynchronous non-volatile RAM is designed with a Spin-Transfer Torque (STT) memory device model and …

    arkansas Repository record for Non-Volatile Memory Adaptation in Asynchronous Microcontroller for Low Leakage Power and Fast Turn-on Time (opens in a new tab)

  5. Asynchronous Circuit Stacking for Simplified Power Management

    … Multi-Threshold NULL Convention Logic (MTNCL) “stacked” circuit architecture that alleviates this problem by reducing the number of voltage converters needed to supply the voltage the ICs operate at. By stacking multiple MTNCL circuits between power and ground, supplying a multiple of …

    arkansas Repository record for Asynchronous Circuit Stacking for Simplified Power Management (opens in a new tab)

  6. Asynchronous Circuit Synthesis Using Multi-Threshold NULL Convention Logic

    … a new flow for such tools which implements the MTNCL asynchronous circuit architecture. </p>

    arkansas Repository record for Asynchronous Circuit Synthesis Using Multi-Threshold NULL Convention Logic (opens in a new tab)

  7. Design and Analysis of an Adaptive Asynchronous System Architecture for Energy Efficiency

    … Multi-Threshold NULL Convention Logic (MTNCL) systems. Results show that energy-efficient systems with low area overhead can be created using this approach.</p>

    arkansas Repository record for Design and Analysis of an Adaptive Asynchronous System Architecture for Energy Efficiency (opens in a new tab)

  8. Technology Mapping, Design for Testability, and Circuit Optimizations for NULL Convention Logic Based Architectures

    <p>Delay-insensitive asynchronous circuits have been the target of a renewed research effort because of the advantages they offer over traditional synchronous circuits. Minimal timing analysis, inherent robustness against power-supply, temperature, and process variations, reduced energy …

    arkansas Repository record for Technology Mapping, Design for Testability, and Circuit Optimizations for NULL Convention Logic Based Architectures (opens in a new tab)