Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 35 for “"Low power design"”.
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Low-power design techniques for pipelined analog-to-digital converters
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.
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A Low-Power Design of Motion Estimation Blocks for Low Bit-Rate Wireless Video Communications
… methods for video communications. We propose a low-power design of a motion estimation block for a low bit-rate video codec standard H.263. Since the motion estimation is computationally intensive to result in large power consumption, a low-power design is essential for portable or mobile …
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A polyhedral-based systemc modeling and generation framework for effective low-power design space exploration
… need for automation and acceleration of the design process. A classical approach is to take a C/C++ specification of the application, convert it to a SystemC (or equivalent) description of hardware implementing this application, and perform successive refinement of the description to improve …
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On the Low Power Design of DCT and IDCT for Low Bit Rate Video Codecs
… surveillance systems, and mobile patrols. The design of a wireless video system must consider two important constraints: low bit rate and low power dissipation. The ITU-T H.263 video codec standard is suitable for low bit rate wireless video systems, however it is computationally intensive. …
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On a Viterbi decoder design for low power dissipation
… communications are complex and dissipate large power. With the proliferation of battery powered devices such as cellular phones and laptop computers, power dissipation, along with speed and area, is a major concern in VLSI design. In this thesis, we investigated a low-power design of Viterbi …
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On a turbo decoder design for low power dissipation
… With the proliferation of the battery powered devices, power dissipation, along with speed and area, is a major concern in VLSI design. In this thesis, we investigated a low-power design of a turbo decoder based on the log-MAP algorithm. Our turbo decoder has two component log-MAP …
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Low Power Merged LNA and Mixer Design for Medical Implant Communication Services
… device should have a small size, consume ultra-low power, and achieve the date rate of at least 200 kbps within 2 m distance. The major challenge is to realize ultra-low power devices. Thus the low-power design of the RF circuit is crucial for MICS applications as the power consumption of the …
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Integrating a Dual-Vth Design Flow Using Mixed Vth Cell Libraries in EDA Tool
Leakage power has become one of the most important components of power dissipation in sub-micron designs. It is critical to include leakage mitigation methods in the low power design flow. Dual-Vth assignment, an effective leakage reduction technique, has been adopted by industrial EDA tools in …
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Design of a low power VLSI systems powered by ambient mechanical vibration
Low power design trends raise the possibility of using ambient energy to power future digital systems. This thesis explores the design of such systems for collecting and processing data from sensors. The low throughput requirements of this type of computation allows aggressive scaling of supply …
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An ultra-low voltage FFT processor using energy-aware techniques
… such as clock speed or silicon area. Hardware designs are shifting focus toward enabling energy-awareness, allowing the processor to be energy-efficient for a variety of operating scenarios. This is in contrast to conventional low-power design, which optimizes for the worst-case scenario. Here, …
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Task scheduling in high-level synthesis
… as if and case blocks and loops in the data flow graph. A conditional block in a data flow graph introduces the opportunity of conditional resource sharing among the values of variables in the mutually exclusive conditional branches of the conditional block. We also consider the problem of …
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LOW-POWER LOW-VOLTAGE ANALOG CIRCUIT TECHNIQUES FOR WIRELESS SENSORS
<p>This research investigates lower-power lower-voltage analog circuit techniques suitable for wireless sensor applications. Wireless sensors have been used in a wide range of applications and will become ubiquitous with the revolution of internet of things (IoT). Due to the demand of low cost, …
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Algorithm-circuit co-design for detecting symptomatic patterns in biological signals
… thesis has explored the algorithm-circuit co-design approach for developing an energy efficient epileptic seizure detection processor which could be used for implantable epilepsy prosthesis. Novel wavelet transform based algorithms are proposed for accurate detection of epileptic seizures. …
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Techniques for low power analog, digital and mixed signal CMOS integrated circuit design
… electronics and implantable medical devices, low power is becoming increasingly important in integrated circuits. The low power design can increase operation time and/or utilize a smaller size and lighter-weight battery. In this dissertation, several low power complementary …
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Estimation-theoretic framework for robust and energy-efficient system design
… of embedded computing is lack of adequate power supply. Unlike the exponential growth in computing capability, the improvements in power sources have been lackluster. Technology scaling, driven by Moore's law, has produced smaller devices that can operate on lower supply voltages; but as a …
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Smart Antennas at Handsets for the 3G Wideband CDMA Systems and Adaptive Low-Power Rake Combining Schemes
… SCFCM are useful to evaluate the upper and the lower bounds of the system performance. To model the actual channel of dual antenna signals lying in between these two channel models, the ECFCM is considered. In this model, two Rayleigh fading antenna signals for each multipath are assumed to have …
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Asynchrobatic logic for low-power VLSI design
… Asynchrobatic Logic is presented. It is a novel low-power design style that combines the energy saving benefits of asynchronous logic and adiabatic logic to produce systems whose power dissipation is reduced in several different ways. The term “Asynchrobatic” is a new word that can be used to …
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A high speed serializer/deserializer design
… skew problems, simplifies data transmission, lowers the power consumption and reduces the chip cost. The goal of this project was to solve the challenges in high speed SerDes design, which included the low jitter design, wide bandwidth design and low power design.</p><p>A quarter-rate …
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Ultra low power, high sensitivity secure wake-up receiver for the Internet of Things
… the sensors and nodes have a highly constrained power budget or even operate using a batteryless energy-harvesting scheme. With tons of data being transmitted through the IoT nodes, the specifications dictate an ultra low power design with secure communication. An ultra low power wake-up receiver …
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A Fully Diff�erential Phase-Locked Loop With Reduced Loop Bandwidth Variation
… imposed by modern wireless standards, meeting low power consumption budgets to prolong battery lifetimes, operating under reduced supply voltages imposed by modern technology nodes and within the noisy environments of complex system-on-chip (SOC) designs, all in addition to consuming as little …
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