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Showing 1 to 3 of 3 for “"Low Power VLSI Design"”.
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Asynchrobatic logic for low-power VLSI design
… Asynchrobatic Logic is presented. It is a novel low-power design style that combines the energy saving benefits of asynchronous logic and adiabatic logic to produce systems whose power dissipation is reduced in several different ways. The term “Asynchrobatic” is a new word that can be used to …
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Low-Power Repeater Insertion for Global Interconnects
… up significant silicon area and consume a lot of power. Consequently, minimization of power consumption of repeaters with timing closure constraints is a very important problem in future low-power VLSI design. In this dissertation, we investigate efficient schemes for low-power repeater insertion …
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Energy-Efficient On-Chip Cache Architectures and Deep Neural Network Accelerators Considering the Cost of Data Movement
付記する学位プログラム名: 京都大学卓越大学院プログラム「先端光・電子デバイス創成学」