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Showing 1 to 20 of 37 for “"Leakage power"”.

  1. Reducing Subthreshold Leakage Power Through Hybrid MOSFET-NEMS Power Gating

    … energy, using up battery life. Increasing power consumption is a rising concern to users and researchers alike. Power gating, turning off a blocks of hardware when idle, reduces static power consumption. The Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) currently employed in …

    vt Repository record for Reducing Subthreshold Leakage Power Through Hybrid MOSFET-NEMS Power Gating (opens in a new tab)

  2. Methodology for Standby Leakage Power Reduction in Nanometer-Scale CMOS Circuits

    <p>In nanometer-scale CMOS technology, leakage power has become a major component of the total power dissipation due to the downscaling of threshold voltage and gate oxide thickness. The leakage power consumption has received even more attention by increasing demand for mobile devices. Since mobile …

    syracuse-diss Repository record for Methodology for Standby Leakage Power Reduction in Nanometer-Scale CMOS Circuits (opens in a new tab)

  3. Non-Volatile Memory Adaptation in Asynchronous Microcontroller for Low Leakage Power and Fast Turn-on Time

    … random-access-memory (RAM) to achieve low leakage power and fast turn-on. This asynchronous non-volatile RAM is designed with a Spin-Transfer Torque (STT) memory device model and CMOS transistors in a 65 nm technology. A self-timed Quasi-Delay-Insensitive 1 KB STT RAM is designed with an …

    arkansas Repository record for Non-Volatile Memory Adaptation in Asynchronous Microcontroller for Low Leakage Power and Fast Turn-on Time (opens in a new tab)

  4. Comparison of Various Pipelined and Non-Pipelined SCl 8051 ALUs

    … designs were compared in terms of area, speed, leakage power, average power and energy per operation. The SCL 8051 ALU without <em>nsleep</em> is smaller and faster, but it has greater leakage power. It also has lower average power, and less energy consumption than the SCL 8051 ALU with both …

    arkansas Repository record for Comparison of Various Pipelined and Non-Pipelined SCl 8051 ALUs (opens in a new tab)

  5. Dynamic Thermal Management for Microprocessors

    … impact system reliability, performance, cost and leakage power. Dynamic thermal management techniques are designed to tackle the problems and control the chip temperature as well as power consumption. They refer to those techniques which enable the chip to autonomously modify the task execution …

    syracuse-diss Repository record for Dynamic Thermal Management for Microprocessors (opens in a new tab)

  6. Effect of MOSFET threshold voltage variation on high-performance circuits

    … increase, limit energy consumption, control power dissipation, and maintain reliability. These continual scaling requirements on supply and threshold voltages pose several technology and circuit design challenges. One such challenge is the expected increase in threshold voltage variation due …

    mit Repository record for Effect of MOSFET threshold voltage variation on high-performance circuits (opens in a new tab)

  7. Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits

    … To control the energy consumption and limit the power dissipation of a circuit, supply voltage should be scaled continually. Threshold voltage should also be reduced to sustain performance and reliability. This scaling of supply and threshold voltage imposes several bottlenecks in ultra-low …

    unm Repository record for Variation Tolerant Energy Efficient Design For Ultra Low Voltage Digital Circuits (opens in a new tab)

  8. Performance variations due to layout-dependent stress in VLSI circuits

    … circuit-level variations in path delays and leakage power. Based on this analysis, layout optimization strategies are derived. In 3D-ICs, through silicon vias (TSVs) introduce unintentional thermally-induced stress in the layout, which results in placement dependent circuit performance …

    umn Repository record for Performance variations due to layout-dependent stress in VLSI circuits (opens in a new tab)

  9. TEMPERATURE AND LEAKAGE AWARE TECHNIQUES TO IMPROVE CACHE RELIABILITY

    Decreasing power consumption in small devices such as handhelds, cell phones and high-performance processors is now one of the most critical design concerns. On-chip cache memories dominate the chip area in microprocessors and thus arises the need for power efficient cache memories. Cache is the …

    siu-theses Repository record for TEMPERATURE AND LEAKAGE AWARE TECHNIQUES TO IMPROVE CACHE RELIABILITY (opens in a new tab)

  10. Design and Analysis of an Asynchronous Microcontroller

    … compared in terms of area, active energy, and leakage energy. Techniques to reduce MTNCL pipeline activity and improve MTNCL register file area and power consumption are introduced. The results show the MTNCL design to have superior leakage power characteristics. The area and active energy …

    arkansas Repository record for Design and Analysis of an Asynchronous Microcontroller (opens in a new tab)

  11. Design Automation Flow for Voltage Adaptive Light Vth Hopping for Leakage Minimization in Sequential Circuits

    <p>Scaling technology has resulted in increased leakage power consumption in VLSI circuits. Even though there are several power consumption reduction techniques in the industry today, the increasing leakage power consumption in the deep submicron CMOS technologies has manifested the need for more …

    ohiolink Repository record for Design Automation Flow for Voltage Adaptive Light Vth Hopping for Leakage Minimization in Sequential Circuits (opens in a new tab)

  12. Spin-Transfer-Torque (STT) Devices for On-chip Memory and Their Applications to Low-standby Power Systems

    … of CMOS technology, the proportion of the leakage power to total power consumption increases. Leakage may account for almost half of total power consumption in high performance processors. In order to reduce the leakage power, there is an increasing interest in using nonvolatile storage …

    purdue-thes Repository record for Spin-Transfer-Torque (STT) Devices for On-chip Memory and Their Applications to Low-standby Power Systems (opens in a new tab)

  13. Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits

    … case of voltage scaling, can greatly reduce the power consumption of circuits. Despite the fact that Ultra-Low-Voltage operation has been proven to be very effective by several successful prototypes in recent years, there is no fast, effective, and comprehensive technique for designers to …

    vt Repository record for Fast Approximation Framework for Timing and Power Analysis of Ultra-Low-Voltage Circuits (opens in a new tab)

  14. Banked microarchitectures for complexity-effective superscalar microprocessors

    … greater emphasis on reducing both switching and leakage power. However, these fully orthogonal structures are over-engineered for typical use. Banked microarchitectures that consist of multiple interleaved banks of fewer ported cells can significantly reduce power, area, and latency of these …

    mit Repository record for Banked microarchitectures for complexity-effective superscalar microprocessors (opens in a new tab)

  15. Low-Power Communication Circuits for Net-Zero-Energy IoT Nodes

    … by the fundamental need of IoT devices for power. Currently, IoT devices are powered by a battery, which must be periodically replaced or recharged, or powered from the electrical grid, which limits mobility and requires a permanent wired connection. This thesis presents a solution in the …

    mit Repository record for Low-Power Communication Circuits for Net-Zero-Energy IoT Nodes (opens in a new tab)

  16. Variation-aware placement tool for Field Programmable Gate Array devices

    … important role with regards to circuit delay and leakage power dissipation. These process variations cause variability in circuit performance characteristics that can be minimized by improving process control techniques, resulting in more predictable behavior. However, if we are concerned with …

    mit Repository record for Variation-aware placement tool for Field Programmable Gate Array devices (opens in a new tab)

  17. Integrating a Dual-Vth Design Flow Using Mixed Vth Cell Libraries in EDA Tool

    Leakage power has become one of the most important components of power dissipation in sub-micron designs. It is critical to include leakage mitigation methods in the low power design flow. Dual-Vth assignment, an effective leakage reduction technique, has been adopted by industrial EDA tools in …

    maryland Repository record for Integrating a Dual-Vth Design Flow Using Mixed Vth Cell Libraries in EDA Tool (opens in a new tab)

  18. CAD Tool Design for NCL and MTNCL Asynchronous Circuits

    … convert Boolean designs into an ultra-low power asynchronous design methodology called MTNCL, which combines multi-threshold CMOS (MTCMOS) with NULL Convention Logic (NCL) systems. MTNCL provides the leakage power advantages of an all high-Vt implementation with a reasonable speed penalty …

    arkansas Repository record for CAD Tool Design for NCL and MTNCL Asynchronous Circuits (opens in a new tab)

  19. Design of low-power digital circuits in the sub-threshold domain

    The demand of low power consumption in microelectronics circuits has increased significantly as submicron technologies scale down. Battery operated portable applications are in high demand across the industries such as automotive, medical, MEMS, telecommunication and so on. Subthreshold operations …

    bielefeld Repository record for Design of low-power digital circuits in the sub-threshold domain (opens in a new tab)

  20. Use of high-level design information for enabling automation of fine-grained power gating

    Leakage power reduction through power gating requires considerable design and verification effort. Conventionally, extensive analysis is required for dividing a heterogeneous design into power domains and generating control signals for power switches because of the need to preserve design behavior. …

    mit Repository record for Use of high-level design information for enabling automation of fine-grained power gating (opens in a new tab)

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