Global ETD Search

Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

Results

Showing 1 to 11 of 11 for “"Interface trap density"”.

  1. Effects of Depth Variation of Substrate Dopant Impurity Concentration on the Interface Trap Density Determination in Mos Devices (Semiconductor)

    … concentration variation with depth on the interface trap density determination using the high-frequency capacitance-voltage (HFCV) or Terman method with a constant dopant concentration assumption has been quantitatively studied. A systematic correction scheme for nonconstant dopant …

    uiuc Repository record for Effects of Depth Variation of Substrate Dopant Impurity Concentration on the Interface Trap Density Determination in Mos Devices (Semiconductor) (opens in a new tab)

  2. Electronic devices based on 2D material: fabrication, characterization and analysis

    … nitride (BN) capacitors, we extracted the interface trap density and time constant and found that the interface trap density in Al2O3 is about 10 times that in BP/BN capacitors, indicating the superior quality of the single-crystal BN. We confirmed that the interface trap density increases …

    uiuc Repository record for Electronic devices based on 2D material: fabrication, characterization and analysis (opens in a new tab)

  3. Influence of SiNx/Si interface states on Si solar cells

    Impact of the SiN_x/n^+-Si interface on silicon solar cell performance was investigated, where SiN_x is used as a passivation layer. Significant shifts in capacitance, conductance and leakage current characteristics were observed for metal/SiN:H/n^+-Si MOS capacitor when it was subjected to a …

    njit Repository record for Influence of SiNx/Si interface states on Si solar cells (opens in a new tab)

  4. Deposition and Characterization of Silicon Nitride/gallium Arsenide Metal Insulator Semiconductor Structures With Heteroepitaxial Interlayers

    … examining the insulator/semiconductor interface are complemented by in situ analyses such as reflection high electron energy diffraction, scanning tunneling microscopy, and x-ray photoelectron spectroscopy as well as ex situ spectroscopic ellipsometry and high resolution transmission …

    uiuc Repository record for Deposition and Characterization of Silicon Nitride/gallium Arsenide Metal Insulator Semiconductor Structures With Heteroepitaxial Interlayers (opens in a new tab)

  5. Interfacial Structures of Oxides on GaAs

    … oxide among others shows a low interface trap density (D$\rm\sb{it})$ at the oxide-GaAs interface. It is low enough to warrant the demonstration of both n- and p-channel enhancement GaAs MOSFETs. High-resolution transmission electron microscopy (HRTEM) indicates that deposition …

    uiuc Repository record for Interfacial Structures of Oxides on GaAs (opens in a new tab)

  6. Metal-assisted chemical etching of β-gallium oxide

    … β-Ga2O3 MOS capacitor structures, and the lowest interface trap density extracted from etched interfaces is only 2.73×1011cm-2-eV-1, which is comparable to that of other published values of unetched β-Ga2O3 surfaces. This confirms that MacEtch is an effective etching method for producing high …

    uiuc Repository record for Metal-assisted chemical etching of β-gallium oxide (opens in a new tab)

  7. All-Inkjet-Printed Low-Voltage Organic Thin-Film Transistors

    … less than 3 V are demonstrated through reducing trap density in the fabricated devices. The transistors use 6,13-bis(triisopropylsilylethynyl)pentacene as the semiconductor, poly(4-vinylphenol) as the dielectric, silver as the electrodes, and CYTOP as the encapsulation. Several aspects of …

    cambridge Repository record for All-Inkjet-Printed Low-Voltage Organic Thin-Film Transistors (opens in a new tab)

  8. Characterization and Modeling of Low Frequency Noise and Dielectric Traps in Scaled MOSFET Devices

    … and systems of better performance, higher density, and lower cost for electronic products through the past several decades. The high-K materials are introduced into the MOSFET structure to reduce the gate leakage current, increase the gate capacitance for current drive and reduce short …

    ohiolink Repository record for Characterization and Modeling of Low Frequency Noise and Dielectric Traps in Scaled MOSFET Devices (opens in a new tab)

  9. Plasma induced damage to Si and SiGe devices and materials

    … the damages to thin gate oxides and Si/SiO_2 interface. The shift of flat band voltage, the reduction of breakdown voltage and the creation of high interface trap density were found to be in good agreement with the creation of suboxidation states at Si/SiO_2 interface. It is observed that …

    njit Repository record for Plasma induced damage to Si and SiGe devices and materials (opens in a new tab)

  10. FABRICATION AND CHARACTERIZATION OF ACTIVE NANOSTRUCTURES

    … on low-frequency noise measurement to envisage trap density in the semiconductor bandgap near the semiconductor/oxide interface of nanoscale silicon junctionless transistors (JLTs) is presented. Low-frequency noise characterization of JLTs biased in saturation is conducted at different gate …

    purdue-thes Repository record for FABRICATION AND CHARACTERIZATION OF ACTIVE NANOSTRUCTURES (opens in a new tab)

  11. Advanced characterization of 4H-SiC MOSFET channel [Caratterizzazione avanzata del canale 4H-SiC MOSFET]

    … macroscopica per determinare l'influenza delle trappole di interfaccia al confine SiO2/SiC, che continuano a rappresentare una criticità sia per la mobilità di canale che per la stabilità della tensione di soglia. Per quantificare questi effetti, è stato sviluppato in MATLAB un framework …

    catania Repository record for Advanced characterization of 4H-SiC MOSFET channel [Caratterizzazione avanzata del canale 4H-SiC MOSFET] (opens in a new tab)