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Showing 1 to 2 of 2 for “"Hybrid Quick Error Detection (H-QED)"”.

  1. Low-cost error detection through high-level synthesis

    … logic bugs, hot spots, wear-out, and soft errors. To make matters worse, as we reach the limits of Dennard scaling, efforts to improve system performance and energy efficiency have resulted in the integration of a wide variety of complex hardware accelerators in SoCs. Thus the challenge is …

    uiuc Repository record for Low-cost error detection through high-level synthesis (opens in a new tab)

  2. Robust and reliable hardware accelerator design through high-level synthesis

    … logic bugs, hot spots, wear-out, and soft errors. To make matters worse, as we reach the limits of Dennard scaling, efforts to improve system performance and energy efficiency have resulted in the integration of a wide variety of complex hardware accelerators in SoCs. Thus the challenge is …

    uiuc Repository record for Robust and reliable hardware accelerator design through high-level synthesis (opens in a new tab)