Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 12 of 12 for “"Hardware transactional memory"”.
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Investigation of hardware transactional memory
Hardware transactional memory is a new method of optimistic concurrency control that can be used to solve the synchronization problem in multicore software. It is a promising solution due to its simple semantics and good performance relative to traditional approaches. Before we can incorporate this …
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Mutex Locking versus Hardware Transactional Memory: An Experimental Evaluation
… methods like fine-grained mutex locks. Transactional memory, and its implementation as hardware transactional memory, allow programmers to write concurrent applications without the attendant complexity of programming with mutex locks. This allows programmers to focus on optimizing the …
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Hardware support for unbounded transactional memory
In this thesis, I propose a design for hardware transactional memory where the transaction size is not bounded by a specialized hardware buffer such as a cache. I describe an unbounded transactional memory system called UTM (unbounded transactional memory) that exploits the perceived common case …
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Scaling address-space operations on Linux with TSX
… is difficult and error-prone to implement. Hardware Transactional Memory (HTM) addresses this problem by providing hardware support for concurrently executing arbitrary read-modify-write memory transactions. Intel released Transactional Synchronization eXtensions (TSX), a HTM implementation, …
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Architectural and compiler support for strongly atomic transactional memory
… and HyApeX, a hybrid of the software and hardware systems, obtaining the benefits of both. The software transaction system implements strong atomicity, which ensures that transactions are protected from the influence of nontransactional code. Previous software systems use weaker atomicity …
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Architectural support for commutativity in hardware speculation
Hardware speculative execution schemes (e.g., hardware transactional memory (HTM)) enjoy low run-time overheads but suffer from limited concurrency because they detect conflicts at the level of reads and writes. By contrast, software speculation schemes can reduce conflicts by exploiting that many …
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Designing Practical Software Bug Detectors Using Commodity Hardware and Common Programming Patterns
… in mind, we propose to: 1) leverage commodity hardware to reduce run-time overhead, 2) reuse metadata maintained by one bug detector to detect other types of bugs, reducing space overhead, and 3) apply programming idioms to static analyses, improving scalability and precision. We demonstrate …
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Software lock elision for x86 machine code
… becoming a topic of intense research there is no transactional memory hardware nor any examples of software transactional memory use outside the research community. Using software transactional memory in large pieces of software needs copious source code annotations and often means that standard …
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Architectural support to exploit commutativity in shared-memory systems
… it would be ideal to exploit commutativity in hardware. In fact, hardware already provides much of the functionality that is required to support commutativity For instance, private caches can buffer and coalesce multiple updates. However, current memory hierarchies can understand only reads and …
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Extracting Parallelism from Legacy Sequential Code Using Transactional Memory
… loops, traces, tasks); the need for custom hardware support; using optimistic execution or relying on conservative decisions; online, offline or both; and the level of source code exposure. Transactional Memory (TM) has emerged as a powerful concurrency control abstraction. TM simplifies …
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Popcorn Linux: A Compiler and Runtime for Execution Migration Between Heterogeneous-ISA Architectures
… adds significant complexity to both hardware and software, recent works have shown tremendous power and performance benefits obtainable through specialization. It is clear that emerging systems will be increasingly heterogeneous. Many of these emerging systems couple together cores of …
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Hybrid STM/HTM for nested transactions in Java
<p>Transactional memory (TM) has long been advocated as a promising pathway to more automated concurrency control for scaling concurrent programs running on parallel hardware. Software TM (STM) has the benefit of being able to run general transactional programs, but at the significant cost of …