Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 12 of 12 for “"Hardware Description Language (HDL)"”.
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An automatic test generation method for chip-level circuit descriptions
… generates tests for circuits described in a hardware description language (HDL). The input description is in a non-procedural subset of VHDL, with a simplified period-oriented timing model. The fault model, based on previous research, includes micro-operation and control statement faults. The …
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High Level Synthesis and Evaluation of the Secure Hash Standard for FPGAs
… slow, therefore, acceleration must be done using hardware such as Field Programmable Gate Arrays (FPGAs). Considerable work has been done in academia using FPGAs to accelerate SHAs. These designs were implemented using Hardware Description Language (HDL) based design methodologies, which are …
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Educational applications of partial reconfiguration of FPGAS
… scheme can be implemented without any use of Hardware Description Language (HDL), embedded, and software development design. After implementing these models on an FPGA the results of these implementations are analyzed and compared with the simulation results. The results demonstrate the proper …
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COMMON MODE VOLTAGE ELIMINATION IN THREE-PHASE FOUR-LEG INVERTERS UTILIZING PULSE DENSITY MODULATION
… control system was converted to Verilog, a hardware description language (HDL) utilizing MATLAB HDL coder in order to control the laboratory prototype via a field-programmable gate array (FPGA). Simulated and experimental results demonstrate that both the unbalanced load requirements in …
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Verik: Reinterpreting Kotlin as a Hardware Description Language
This work introduces Verik, a hardware description language (HDL) for designing and verifying digital integrated circuits. Verik aims to be a drop-in replacement for SystemVerilog that leverages the productivity gains of the modern software stack to improve engineer productivity. Verik builds upon …
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A verified compiler for Handel-C
… (FPGA) technology has made the synthesis of Hardware Description Language (HDL) programs into FPGAs a very attractive topic for research. In particular, the correctness in the synthesis of an FPGA programming file from a source HDL program has gained significant relevance in the context of …
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Model order reduction of electro-thermal MEMS
… order models can be formally converted into Hardware Description Language (HDL) form and directly used in system-level simulation. <br>The results obtained in this thesis led to the creation of the software tool mor4ansys at the chair for simulation of the university of Freiburg. Presently it …
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Coverage-directed validation of hardware models
… behavioral or Register-Transfer level (RTL) description of the system functionality using a Hardware Description Language (HDL). After that they transform the HDL description to the gate-level, transistor level, and finally generate mask-level layout which is used to manufacture the chip. CAD …
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On the Programmability and Performance of OpenCL Designs for FPGA
… the programming model, which uses a low-level hardware description language (HDL). Using HDLs require a detailed understanding of logic design and significant effort to implement and verify the behavioral models, with the latter growing with its complexity. Recent advancements in high-level …
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Bit-Stream Control of Doubly Fed Induction Generators
… to this performance limitation is the use of hardware based control systems, which can execute control algorithms extremely quickly because many operations are processed in parallel. This is attractive for use in control systems, but implementing hardware control systems is difficult. The …
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Improving the freshman electrical and computer engineering lab
… a new microcontroller-based board with a pseudo hardware description language is discussed. The new microcontroller based system implementation is extensively detailed along with its new accompanying description language. This new system was tried in several sections of the Fall 2008 semester …
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X-ray microscope performance enhancement through control architecture change
… implemented on the EUI system. The controller hardware used for implementation is National Instruments (NI) CompactRIO hardware that consists of a real-time controller, a FPGA built into the hardware chassis, analog I/O modules, and digital I/O modules. NI LabVIEW, the dedicated software to the …