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Showing 1 to 1 of 1 for “"Hardened Latch Designs"”.
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Analysis and Mitigation of Multiple Radiation Induced Errors in Modern Circuits
… This, in turn has created a need for new circuit designs that can tolerate multiple simultaneous errors. A common type of error in memory elements is the double node upset (DNU) which has continued to become more common. All existing DNU tolerant designs either suffer from high area and …