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Showing 1 to 20 of 29 for “"FPGA hardware"”.

  1. Evaluating FFT Implementations Developed for use on FPGA Hardware

    … spectrometers. Field Programmable Gate Arrays (FPGAs) are a type of hardware commonly used to perform the various computations required to process incoming radio signals, including the FFT. As the FFT is a pivotal part of the DSP chain, the performance of the FFT implementation is a primary …

    cape-town Repository record for Evaluating FFT Implementations Developed for use on FPGA Hardware (opens in a new tab)

  2. High Level Synthesis and Evaluation of the Secure Hash Standard for FPGAs

    … slow, therefore, acceleration must be done using hardware such as Field Programmable Gate Arrays (FPGAs). Considerable work has been done in academia using FPGAs to accelerate SHAs. These designs were implemented using Hardware Description Language (HDL) based design methodologies, which are …

    windsor Repository record for High Level Synthesis and Evaluation of the Secure Hash Standard for FPGAs (opens in a new tab)

  3. Implementation of Separable & Steerable Gaussian Smoothers on an FPGA

    … Gaussian smoothers on a Xilinx VirtexII Pro FPGA platform. FPGAs are Field Programmable Gate Arrays which consist of a collection of logic blocks including lookup tables, flip flops and some amount of Random Access Memory. All blocks are wired together using an array of interconnects. The …

    uno Repository record for Implementation of Separable & Steerable Gaussian Smoothers on an FPGA (opens in a new tab)

  4. Digital pulse processing

    … discrete-event simulation software and an FPGA hardware platform are developed. Many applications of pulse-processing are explored including filtering and signal processing, solving differential equations, optimization, the minsum / Viterbi algorithm, and the decoding of low-density …

    mit Repository record for Digital pulse processing (opens in a new tab)

  5. Stability Enhancement of the Microgrid under High-depth of Penetration of Electronically-coupled Resources

    … demonstrated based on their implementation on an FPGA hardware platform. The study results show that the proposed method can effectively enhance the microgrid stability subsequent to a set of single contingencies.

    toronto-retro Repository record for Stability Enhancement of the Microgrid under High-depth of Penetration of Electronically-coupled Resources (opens in a new tab)

  6. High dynamic range video merging, tone mapping, and real-time implementation

    … Additionally, Field Programmable Gate Array (FPGA) hardware implementation details are given to support real time HDR video. Still frames from the acquired HDR video system which have been merged used the merging and tone mapping techniques will be presented.

    unm Repository record for High dynamic range video merging, tone mapping, and real-time implementation (opens in a new tab)

  7. FPGA Prototyping of a Watermarking Algorithm for MPEG-4

    … response is always required. For this reason, an FPGA hardware implementation is studied in this work. This thesis deals with video compression, watermarking algorithms and their hardware implementation with FPGAs. A prototyping VLSI architecture will implement video compression and watermarking …

    unt Repository record for FPGA Prototyping of a Watermarking Algorithm for MPEG-4 (opens in a new tab)

  8. Modular multiplication in the residue number system

    … thesis contributes arithmetic algorithms and hardware architectures for the modular multiplication Z = A × B mod M. This operation is the basis of many public-key cryptosystems including RSA and Elliptic Curve Cryptography. The Residue Number System (RNS) is used to speed up long word length …

    adelaide Repository record for Modular multiplication in the residue number system (opens in a new tab)

  9. New d-piso architecture for dynamic symbol size digital baseband modulation implementation in FPGA

    … of the symbol created an additional problem in hardware design as the size of symbol needed to be defined clearly and it cannot be change and altered once the design has been generated. Thus, to address the issue, this research investigated the best implementation method and performance study of …

    uthm Repository record for New d-piso architecture for dynamic symbol size digital baseband modulation implementation in FPGA (opens in a new tab)

  10. Semi Autonomous Vehicle Intelligence: Real Time Target Tracking For Vision Guided Autonomous Vehicles

    … developments in field programmable gate arrays (FPGAs) provide an alternative for hardware and software co-design of complicated real-time vision algorithms. By tracking features from one frame to another, it becomes possible to perform many different high-level vision tasks, including object …

    byu Repository record for Semi Autonomous Vehicle Intelligence: Real Time Target Tracking For Vision Guided Autonomous Vehicles (opens in a new tab)

  11. A scalable packetised radio astronomy imager

    … the instruments use highly specialised, custom hardware in order to cope with the demanding engineering requirements. Modern technology has enabled reprogrammable FPGA-based processing boards, together with packet-based switching techniques, to perform all the digital signal processing …

    cape-town Repository record for A scalable packetised radio astronomy imager (opens in a new tab)

  12. Reconfigurable System-on-Chip Architecture for Neural Signal Processing

    … of efficient real-time algorithms and real-time hardware that can handle massively parallel channels of neural data. The research presented here addresses this issue by developing real-time neural processing algorithms that can be implemented in reconfigurable hardware and thus, can be scaled to …

    temple Repository record for Reconfigurable System-on-Chip Architecture for Neural Signal Processing (opens in a new tab)

  13. Enhancing GNU Radio for Run-Time Assembly of FPGA-Based Accelerators

    … designs made possible with actual physical radio hardware. In order for SDRs to become more prevalent in radio prototyping and development, accelerators must be added to high-throughput and computationally intensive portions. Custom DSPs, GPUs, and FPGAs have all been added to SDRs to try and …

    vt Repository record for Enhancing GNU Radio for Run-Time Assembly of FPGA-Based Accelerators (opens in a new tab)

  14. High Performance and Reliable Gbps Spacecraft Data Handling System

    … about the SpaceFibre standard, design, FPGA hardware implementation, and validation through ground check-out hardware. However, no studies of SpaceFibre have been carried out with an onboard compatible high data generating payload. This Ph.D. thesis contains an original contribution of …

    dundee Repository record for High Performance and Reliable Gbps Spacecraft Data Handling System (opens in a new tab)

  15. Fast Split Arithmetic Encoder Architectures and Perceptual Coding Methods for Enhanced JPEG2000 Performance

    … standard. Past research on fast EBCOT tier-1 hardware implementations has concentrated on cycle efficient context formation. These pass-parallel architectures require that JPEG2000's three mode switches be turned on. While turning on the mode switches allows for arithmetic encoding from each …

    vt Repository record for Fast Split Arithmetic Encoder Architectures and Perceptual Coding Methods for Enhanced JPEG2000 Performance (opens in a new tab)

  16. System-on-chip-based radiation imaging system with pulse shape discrimination capability

    … reflector should be implemented. Finally, the FPGA-based readout provides a compact and programmable platform capable of on-board advanced analysis in real time. The maximum-likelihood expectation-maximization (MLEM) image reconstruction algorithms was implemented on a PYNQ-Z2 System-on-Chip …

    uiuc Repository record for System-on-chip-based radiation imaging system with pulse shape discrimination capability (opens in a new tab)

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