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Showing 1 to 5 of 5 for “"FPGA Reconfiguration"”.

  1. Facilitating FPGA Reconfiguration through Low-level Manipulation

    The process of FPGA reconfiguration is to recompile a design and then update the FPGA configuration correspondingly. Traditionally, FPGA design compilation follows the way how hardware is compiled for achieving high performance, which requires a long computation time. How to efficiently compile a …

    vt Repository record for Facilitating FPGA Reconfiguration through Low-level Manipulation (opens in a new tab)

  2. A Self-Reconfiguring Platform For Embedded Systems

    … Interface has significantly shortened FPGA reconfiguration times by manipulating the configurable resources of the FPGAs directly under software control. The execution of JBits programs, however, requires a Java Virtual Machine to be implemented on the platform where the configurations …

    vt Repository record for A Self-Reconfiguring Platform For Embedded Systems (opens in a new tab)

  3. Parallelization of dynamic programming recurrences in computational biology

    … kernels using field-programmable gate arrays: FPGAs). We advocate a high-level synthesis approach, using the recurrence equation abstraction to represent dynamic programming and polyhedral analysis to exploit parallelism. We suggest a novel technique within the polyhedral model to optimize for …

    wustl Repository record for Parallelization of dynamic programming recurrences in computational biology (opens in a new tab)

  4. Dynamic reconfiguration methods in FPGA-based softawre defined radio system for wireless mobile standards

    … to date. Field Programmable Gate Arrays (FPGAs) are programmable hardware devices which can perform complex calculations with high performance, and therefore, are well suited to wireless communication applications. FPGAs are selected as the reconfigurable devices used to perform various …

    strathclyde Repository record for Dynamic reconfiguration methods in FPGA-based softawre defined radio system for wireless mobile standards (opens in a new tab)

  5. H-SIMD machine : configurable parallel computing for data-intensive applications

    … applications on field-programmable gate arrays (FPGAs). H-SIMD targets data-intensive applications for FPGA-based system designs. The H-SIMD machine is associated with a hierarchical instruction set architecture (HISA) which is developed for each application. The main objectives of this work are …

    njit Repository record for H-SIMD machine : configurable parallel computing for data-intensive applications (opens in a new tab)