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Showing 1 to 8 of 8 for “"FPGA Development"”.

  1. Architectural Level Computational Hardware Abstraction: A New Programming Language for FPGA Projects

    … especially field programmable gate arrays, or FPGAs. Modern software languages have been developed, adding features such as duck-typing, dynamic interpretation, built-in high level data structures, etc. Yet, FPGA development is still mostly using traditional hardware description languages such …

    cape-town Repository record for Architectural Level Computational Hardware Abstraction: A New Programming Language for FPGA Projects (opens in a new tab)

  2. Manta: An In-Situ Debugging Tool for Programmable Hardware

    … toolchains for Field Programmable Gate Array (FPGA) development, which include utilities for debugging logic on the FPGA itself. As an alternative, this work proposes Manta, a lightweight, modular, platform-independent, and intuitive tool for debugging digital logic on FPGAs. Manta is designed …

    mit Repository record for Manta: An In-Situ Debugging Tool for Programmable Hardware (opens in a new tab)

  3. A Design Assembly Technique for FPGA Back-End Acceleration

    … to restrict Field-Programmable Gate Array (FPGA) adaptation in modern computing platforms. This work presents an FPGA development paradigm that exploits logic variance and hierarchy as a means to increase FPGA productivity. The practical tasks of logic partitioning, placement and routing are …

    vt Repository record for A Design Assembly Technique for FPGA Back-End Acceleration (opens in a new tab)

  4. A Scalable Approach to Multi-core Prototyping

    … of scalable architectures and software development environments for multi-core hardware. How should processors effectively and quickly pass information, with as little overhead as possible? What kind of communication architecture is best suited for parallelism? How can large-scale …

    vt Repository record for A Scalable Approach to Multi-core Prototyping (opens in a new tab)

  5. Developing a multi-level fault injection environment

    … The first part of the thesis describes the FPGA development framework for a specific processor. Simulation based fault injection techniques are described in the later sections. The final parts cover analysis techniques and applications that can benefit from such systems.

    texas Repository record for Developing a multi-level fault injection environment (opens in a new tab)

  6. New d-piso architecture for dynamic symbol size digital baseband modulation implementation in FPGA

    … modulation for optical communication system in FPGA hardware design. KCU105 FPGA development board and Vivado software were chosen as the main platform to implement the design. A new architecture to implement dynamic symbol size baseband modulation in FPGA is presented in this thesis. Clock …

    uthm Repository record for New d-piso architecture for dynamic symbol size digital baseband modulation implementation in FPGA (opens in a new tab)

  7. Implementation of the Transmitting Functionality on the TIGER-3 FPGA-based Transceiver Platform

    … TIGER-3 transceiver is built around a Virtex-5 FPGA that is connected to various peripherals such as ADCs, DACs, and digital step attenuators that make it perfectly suited to a wide variety of HF radar applications. Currently, the mode of operation of the TIGER-3 platform is limited, as South …

    cape-town Repository record for Implementation of the Transmitting Functionality on the TIGER-3 FPGA-based Transceiver Platform (opens in a new tab)

  8. Design and implementation of the Hybrid Detector for Microdosimetry (HDM): Challenges in readout architecture and experimental results

    … detector. The system is based on an Eclypse-Z7 FPGA development board which can host up to 4 Analog to Digital Converters (ADC). Following a bottom-up approach, this chapter describes first the main characteristics of the signal to be digitized. An overview of the Eclypse-Z7 development board …

    trento Repository record for Design and implementation of the Hybrid Detector for Microdosimetry (HDM): Challenges in readout architecture and experimental results (opens in a new tab)