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Showing 1 to 20 of 58 for “"FIFO"”.

  1. FPGA Prototyping Framework on ARROW SoCKit Board with Xillybus Interface and Standard FIFO

    Field Programmable Gate Array (FPGA) has been a popular candidate in hardware acceleration for offloading compute-intensive tasks from the traditional microprocessors. Due to the parallel nature, algorithm functions implemented on FPGAs can provide acceleration and are more energy efficient than …

    houston Repository record for FPGA Prototyping Framework on ARROW SoCKit Board with Xillybus Interface and Standard FIFO (opens in a new tab)

  2. Extensible Real-Time Sensor and Test Interface for a System-on-Chip

    … Interface (SPI) and First-In/First-Out (FIFO) buses. The custom PCB includes a multiplexer circuit that allows multiple sensors to be connected to the ASIC's single SPI bus. It also includes a USB-to-FIFO interface, developed around the RP2040 microcontroller, which enables connecting a …

    mit Repository record for Extensible Real-Time Sensor and Test Interface for a System-on-Chip (opens in a new tab)

  3. The psychological wellbeing of women operating mining machinery in a fly-in fly-out capacity

    … work role and the impact of fly-in fly-out (FIFO) mining on their wellbeing. An Interpretative Phenomenological Approach (IPA) was used as a framework to explore the experiences of 19 female machine operators through in-depth interviewing at one mineral mine site in Queensland, Australia. IPA …

    edithcowan Repository record for The psychological wellbeing of women operating mining machinery in a fly-in fly-out capacity (opens in a new tab)

  4. MICROARCHITECTURE OF A HIGH THROUGHPUT TEXTURE MAPPING PROCESSOR FOR INTERACTIVE 3D GRAPHICS

    … instruction-data pairs from a 2-word deep input FIFO. Instructions may cause an interpolation in the S, T and Q DDAs. A single cycle decode-execute DDA controller controls all three DDA datapaths in parallel. Instructions may also initiate a computation in a dynamically configured pipeline to …

    nus Repository record for MICROARCHITECTURE OF A HIGH THROUGHPUT TEXTURE MAPPING PROCESSOR FOR INTERACTIVE 3D GRAPHICS (opens in a new tab)

  5. Diastolic arrays : throughput-driven reconfigurable computing

    … exclusively through First-In First-Out (FIFO) queues, and provide hardware support to guarantee bandwidth and buffer space for all data transfers. FIFO control implies that a module idles if its input FIFOs are empty, and stalls if its output FIFOs are full. The timing of data transfers …

    mit Repository record for Diastolic arrays : throughput-driven reconfigurable computing (opens in a new tab)

  6. A Priority-based Fair Queuing (PFQ) Model for Wireless Healthcare System

    … used current models such as First in First Out (FIFO) and Weight Fair Queuing (WFQ). PFQ model has improved transmission of ECG sensor data by decreasing delay and jitter in emergency cases by 83.32% and 75.88% respectively in comparison to FIFO and 46.65% and 60.13% with respect to WFQ model. …

    westminster Repository record for A Priority-based Fair Queuing (PFQ) Model for Wireless Healthcare System (opens in a new tab)

  7. Performance evaluation of multicomputer networks for real-time computing

    … desirable characteristics for real-time systems. FIFO, TDM, and token passing link access protocols and several queueing priorities are studied to measure their effect on the system’s performance. Finally, the contribution of the message parameters to the overall system delay is discussed. …

    vt Repository record for Performance evaluation of multicomputer networks for real-time computing (opens in a new tab)

  8. Optimal allocation of blood products

    … first, thereby following first-in first-out (FIFO) policy; however, hospital blood banks would prefer that the blood center issues out the freshest units first, equivalent to a last-in first-out (LIFO) policy. This study addresses the optimal distribution policy to achieve a desired outdate, …

    njit Repository record for Optimal allocation of blood products (opens in a new tab)

  9. Parallel implementations of dynamic traffic assignment models and algorithms for dynamic shortest path problems

    … list. Then we apply the framework in dynamic FIFO, strict FIFO, and static networks. Computational tests show significant speedups. We proceed to present two other shortest path algorithms: Algorithm Delta and Algorithm Hierarchy. We also provide the evaluations of the algorithms.

    mit Repository record for Parallel implementations of dynamic traffic assignment models and algorithms for dynamic shortest path problems (opens in a new tab)

  10. The effect of estimated processing times versus actual (standard) processing times on various performance measures in a pure job shop

    … In addition, three priority rules, namely, FIFO, SOT and EDD, were studied to determine the best rule for controlling the shop in situations of unreliable processing times data. The percentage variation in processing times was clearly the dominant variable for most of the performance …

    vt Repository record for The effect of estimated processing times versus actual (standard) processing times on various performance measures in a pure job shop (opens in a new tab)

  11. Impact of Queuing Schemes and VPN on the Performance of a Land Mobile Radio VoIP System

    … QoS queuing schemes: first-in first-out queuing (FIFO), priority queuing (PQ), weighted fair queuing (WFQ), and class-based weighted fair queuing (CBWFQ). Quantitative results were obtained for voice application throughput, delay, jitter, and signaling overhead. Results show that, compared to a …

    vt Repository record for Impact of Queuing Schemes and VPN on the Performance of a Land Mobile Radio VoIP System (opens in a new tab)

  12. High Performance Applications on Reconfigurable Clusters

    … Constant coefficient multipliers and a Fast FIFO implementation are also discussed in connection with the FIR filter. This filter is used in two of its structures: the direct-form and the lattice structure. The thesis describes several configurations that can be created with the different …

    vt Repository record for High Performance Applications on Reconfigurable Clusters (opens in a new tab)

  13. An experimental study of monolithic scheduler architecture in cloud computing systems

    … policies in Hadoop YARN: Capacity, Fair and Fifo, over realistic workload. Based on our experiments, we observe that Fifo scheduling results in unbalanced load across cluster machines and is not suitable for enterprise clusters. We study the trade-offs exploited by Capacity and Fair …

    uiuc Repository record for An experimental study of monolithic scheduler architecture in cloud computing systems (opens in a new tab)

  14. A Safety-Performance Framework for Computational Awareness in Autonomous Robots

    … us to apply the schedulers First-In-First-Out (FIFO) and Completely Fair Scheduler (CFS) of the Linux kernel on complex robotic computational tasks and compare the SP metric with baseline metrics, such as average and worst-case makespan. Extensive experimental results on NVIDIA Jetson AGX Xavier …

    vt Repository record for A Safety-Performance Framework for Computational Awareness in Autonomous Robots (opens in a new tab)

  15. An application of Value Stream Mapping to reduce lead time and WIP in a make-to-order manufacturing line

    … Assembly cell concept, workload balancing and FIFO lanes were proposed countermeasures or improvements to address the capacity shortfall. A decrease of 27% in manufacturing lead time was projected if these improvements were made. In addition, the capacity analysis suggests that an expansion is …

    mit Repository record for An application of Value Stream Mapping to reduce lead time and WIP in a make-to-order manufacturing line (opens in a new tab)

  16. Learned scheduling for database management systems

    … in comparison to heuristic schedulers, such as FIFO and fair scheduling.

    mit Repository record for Learned scheduling for database management systems (opens in a new tab)

  17. Multicast Video Transport overiPOINT ATM Testbed

    … with an ISA interface, an ISA backplane, a FIFO module on an ISA board for developing this network module. The embedded controller feeds video data (MPEG-2) to a hardware decoder board. The decoder board provides NTSC output such that full-motion decoded MPEG-2 video can be viewed on an NTSC …

    uiuc Repository record for Multicast Video Transport overiPOINT ATM Testbed (opens in a new tab)

  18. Inflation, Taxation and Corporate Investment in the U.S. During the Great Inflation

    … its features – historical cost depreciation and FIFO inventory accounting – are expected to lower real after-tax corporate cash flows and, thereby, make investment less attractive when expected inflation is elevated. Using Compustat data for 1965-1980 and a difference-in-differences research …

    mit Repository record for Inflation, Taxation and Corporate Investment in the U.S. During the Great Inflation (opens in a new tab)

  19. Resource Allocation in Mobile and Wireless Networks

    … upon the mobile client in a First-In-First-Out (FIFO), Highest-Priority-First (PQ), Weighted Fair-Queuing (WFQ) and Round-Robin (RR) order. In the second area of research, we make modifications to the DSR and TORA routing algorithms to make them energy aware routing protocols. Our research shows …

    unt Repository record for Resource Allocation in Mobile and Wireless Networks (opens in a new tab)

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