Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 9 of 9 for “"Error injection"”.
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A Process Architecture and Runtime Environment for Dependable Distributed Applications
… for the Jet Propulsion Laboratory (JPL). Error injection experiments validate the SIFT environment's ability to recover not only from user application errors, but also ARMOR errors as well. Finally, five other case studies illustrate how the ARMOR-based SIFT environment provides fault …
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Design methods for self-repairing digital logic
… in general, and self-healing in FPGAs. Error rates are measured throughout the design to distinguish between transient errors and permanent or semi-permanent logic faults. Original logic design is automatically transformed to this self-healing architecture via customizable software. …
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Toward high-level synthesis of reliable circuits through low-cost modulo shadow datapaths
… of high-level synthesis to detect control errors through diverse binding and minimize area cost through intelligent checkpoint scheduling and modulo-b reducer sharing. We introduce logic and dataflow optimizations to further reduce cost. We evaluated our technique with 12 high-level …
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Preserving application reliability on unreliable hardware
… such as high-energy particle strikes (or soft-errors). This reliability threat is expected to affect a broad computing market motivating the need for very low cost resiliency solutions. Software anomaly based hardware error detection has emerged as an effective low cost solution. A small fraction …
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Developing a multi-level fault injection environment
… state of the system to change, which might cause errors to the system with non-negligible probability. Such errors are termed "soft errors". Bit flips in the design are good way to model these soft-errors. These bit-flips due to soft errors are random and transient in a design, making their …
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Low-cost error detection through high-level synthesis
… logic bugs, hot spots, wear-out, and soft errors. To make matters worse, as we reach the limits of Dennard scaling, efforts to improve system performance and energy efficiency have resulted in the integration of a wide variety of complex hardware accelerators in SoCs. Thus the challenge is …
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Providing application-aware reliability through OS/hypervisor-level techniques
… software modules for providing application-aware error detection and recovery. The purpose of the RMK is to provide an automatic approach for low-latency crash/hang detection and rapid recovery via checkpoint. We first demonstrate how the RMK works in a native system and then enhance the RMK to …
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Soft-error resilient on-chip memory structures
Soft errors induced by energetic particle strikes in on-chip memory structures, such as L1 data/instruction caches and register files, have become an increasing challenge in designing new generation reliable microprocessors. Due to their transient/random nature, soft errors cannot be captured by …
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Robust and reliable hardware accelerator design through high-level synthesis
… logic bugs, hot spots, wear-out, and soft errors. To make matters worse, as we reach the limits of Dennard scaling, efforts to improve system performance and energy efficiency have resulted in the integration of a wide variety of complex hardware accelerators in SoCs. Thus the challenge is …