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Showing 1 to 7 of 7 for “"Dynamic partial reconfiguration"”.

  1. High-speed dynamic partial reconfiguration for field programmable gate arrays

    With dynamically and partially reconfigurable designs, it is necessary that the speed of the reconfiguration be accomplished in a time that is sufficiently small such that the operation of reconfiguration is not the limiting factor in the process. Therefore, the communication between the source of …

    unm Repository record for High-speed dynamic partial reconfiguration for field programmable gate arrays (opens in a new tab)

  2. An embedded system supporting dynamic partial reconfiguration of hardware resources for morphological image processing

    … leverages a unique capability of FPGAs called dynamic partial reconfiguration (DPR) which allows changing the hardware configuration of silicon pieces at runtime. DPR allows regions of the FPGA to be reprogrammed with new functionality while applications are still running in the remainder of …

    njit Repository record for An embedded system supporting dynamic partial reconfiguration of hardware resources for morphological image processing (opens in a new tab)

  3. Reconfigurable and heterogeneous architectures for efficient computing

    … this dissertation explores the use of reconfiguration to balance flexibility, performance, and energy efficiency. We begin by presenting three novel approaches that explore the use of reconfiguration in the three dominant computing devices -- CPUs, GPUs, and FPGAs. First, we consider …

    uiuc Repository record for Reconfigurable and heterogeneous architectures for efficient computing (opens in a new tab)

  4. Dynamically reconfigurable management of energy, performance, and accuracy applied to digital signal, image, and video Processing Applications

    There is strong interest in the development of dynamically reconfigurable systems that can meet real-time constraints in energy/power-performance-accuracy (EPA/PPA). In this dissertation, I introduce a framework for implementing dynamically reconfigurable digital signal, image, and video processing …

    unm Repository record for Dynamically reconfigurable management of energy, performance, and accuracy applied to digital signal, image, and video Processing Applications (opens in a new tab)

  5. Dynamically Reconfigurable Architectures and Systems for Time-varying Image Constraints (DRASTIC) for Image and Video Compression

    … options over power consumption. The use of dynamic partial reconfiguration with Field Programmable Gate Arrays (FPGAs) provides an opportunity to effectively control dynamic power consumption by jointly considering software-hardware configurations. This dissertation extends traditional …

    unm Repository record for Dynamically Reconfigurable Architectures and Systems for Time-varying Image Constraints (DRASTIC) for Image and Video Compression (opens in a new tab)

  6. Study of Radiation Effects on FPGA and GPU based Neural Networks Accelerator Designs

    … as high as SA. At the same time, the use of dynamic partial reconfiguration (DPR) method combined with soft-error mitigation (SEM) IP core was proposed (AutoDPR-SEM). It significantly improves the reliability of the model without increasing the inference timing of both model. This AutoDPR-SEM …

    sask Repository record for Study of Radiation Effects on FPGA and GPU based Neural Networks Accelerator Designs (opens in a new tab)

  7. A Dynamically Reconfigurable Parallel Processing Framework with Application to High-Performance Video Processing

    … processing systems leads to the consideration of dynamically reconfigurable systems. The goal of this dissertation research was to develop and demonstrate the viability of integrated parallel processing system that effectively and efficiently apply pre-optimized hardware cores for processing video …

    unm Repository record for A Dynamically Reconfigurable Parallel Processing Framework with Application to High-Performance Video Processing (opens in a new tab)