Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 79 for “"Dynamic Power"”.
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Dynamic power management for computing and communication
Power management is essential in state-of-the-art many-core processor and system-on-chip designs due to the ever-increasing demand for performance and the diminishing benefits from technology scaling. With more and more integration of processing cores and functional blocks, aggressive power …
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Throughput for packet radio networks with dynamic power levels
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1984.
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Characterizing Dynamic Power and Data Rate Policies for WirelessUSB Networks
… mobility depends intrinsically on battery life. Power can be conserved at the Media Access Control (MAC) layer by intelligently adjusting transmission power level and data rate encoding. WirelessUSB is a low-power, low-latency wireless technology developed by Cypress Semiconductor Corporation for …
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Modeling and reduction of dynamic power in field-programmable gate arrays
… which makes FPGAs significantly slower and less power-efficient compared to Application Specific Integrated Circuits (ASICs). This thesis investigates three aspects of low-power FPGA design: switching activity estimation, switching activity minimization, and low-power FPGA clock network design. …
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Robustness and Stability of Gallium Nitride Transistors in Dynamic Power Switching
… and the high breakdown field of GaN, GaN power HEMTs enable low specific on-resistance and small capacitance and thus become attractive for high-frequency applications. In addition, most commercial GaN power HEMTs are fabricated on Si substrates up to 8 inches, allowing for a remarkable …
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High Precision Dynamic Power System Frequency Estimation Algorithm Based on Phasor Approach
… eliminating noise in the input data from the power grid so as to make it more purely sinusoidal. Therefore, it will be worthwhile to test more sophisticated digital filters for processing the input data before feeding it to the algorithm.
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Stochastic Learning Feedback Hybrid Automata for Dynamic Power Management in Embedded Systems
Dynamic Power Management (DPM) refers to the strategies employed at system level to reduce energy expenditure (i.e. to prolong battery life) in embedded systems. The trade-off involved in DPM techniques is between the reductions of energy consumption and latency incurred by the jobs to be executed …
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Dynamic power allocation and routing for satellite and wireless networks with time varying channels
… channels that depend on attenuation conditions, power allocation decisions, and inter-channel interference. In order to reliably integrate these systems into a high speed data network and meet the increasing demand for high throughput and low delay, it is necessary to develop efficient network …
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A Comparison of artificial intelligence algorithms for dynamic power allocation in flexible high throughput satellites
The Dynamic Resource Management (DRM) problem in the context of multibeam satellite communications is becoming more relevant than ever. The future landscape of the industry will be defined by a substantial increase in demand alongside the introduction of digital and highly flexible payloads able to …
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Low-Power High-Performance Dynamic Circuit Design for Ultra-Deep Submicron Technology
Domino logic is known to consume more dynamic power than static logic. Low-voltage swing clock domino logic family is developed for substantial dynamic power saving. Delay-constrained power optimization algorithm allocates low supply voltage to logic gates such that dynamic power is minimized with …
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Matching on -Chip Data Storage to Telecommunication and Media Application Properties
… data storage savings in the range of 29% static power and 6% dynamic power are achieved without sacrificing code performance. When slight performance degradation can be tolerated, the compiler uses profile feedback to realize an average of 51.7% static and 9.4% dynamic power reduction.
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Dynamic modelling and simulation of electric power systems using the Newton-Raphson method
… thesis is concerned with the development of a dynamic power flow computer algorithm using Newton's method. It addresses both the development of a positive sequence dynamic power flow algorithm for the dynamic study of balanced power systems and a fully-fledged three-phase dynamic power flow …
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High-Level Resource Binding and Allocation for Power and Performance Optimization
… density and large variations in the delay and power characteristics of on-chip devices. Additionally, with the increasing desirability of low-power chips, decreasing power consumption has become a significant priority. Major sources of dynamic power consumption in modern chips include glitches …
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Dynamically Reconfigurable Architectures and Systems for Time-varying Image Constraints (DRASTIC) for Image and Video Compression
… larger network systems. For different scenarios, power, bitrate and image quality can impose significant time-varying constraints. For example, mobile devices (e.g., phones, tablets, laptops, UAVs) come with significant constraints on energy and power. Similarly, computer networks provide …
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A novel beam management strategy using UE trajectory mapping
… methodology integrates angular weighting, and dynamic power control to enhance beamforming efficiency. The angular weighting function prioritizes signals aligned closely with the beam direction, further enhancing signal strength while reducing unwanted energy dispersion. Additionally, dynamic …
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On a Viterbi decoder design for low power dissipation
… communications are complex and dissipate large power. With the proliferation of battery powered devices such as cellular phones and laptop computers, power dissipation, along with speed and area, is a major concern in VLSI design. In this thesis, we investigated a low-power design of Viterbi …
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Verification-Aware Processor Design
… on more traditional metrics like performance, power, and area. It is thus possible for the resulting design to be very difficult to verify in the end, specifically because its verifiability was not ranked high on the priority list in the beginning. </p><p>In this thesis we propose to view …
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Power Management Schemes for Ultra Low Power Biomedical Devices
Device power dissipation has grown exponentially due to the rapid transistor technology scaling and increased circuit complexity. Motivated by the ultra low power requirements of emerging implantable and wearable biomedical devices, novel power management schemes are presented in this thesis to …
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Power Control and Resource Allocation for QoS-Constrained Wireless Networks
… more users in the existing spectrum, we consider dynamic spectrum access schemes and cognitive radio techniques in this dissertation. Our work includes the modelling, characterization and optimization of QoS-constrained cooperative networks and cognitive radio networks. QoS constraints such as …
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Novel many-core architectures for energy-efficiency
… silicon area for the same functionality. The dynamic power density - equivalently, dynamic power, if the chip area is fixed - stays constant. Static power density, on the other hand, increases. In early generations, however, since the share of static power was practically negligible, dynamic …
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