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Showing 1 to 2 of 2 for “"Dependable Architectures"”.

  1. Cross-layer instruction-aware timing error mitigation & evaluation for energy-efficient dependable architectures

    … complex dynamic timing behaviour of pipelined architectures is exploited and a low power security primitive for hardware-rooted device authentication is proposed. To achieve this, DTA-PUF, a novel lightweight physical unclonable function, is introduced.

    qu-belfast Repository record for Cross-layer instruction-aware timing error mitigation & evaluation for energy-efficient dependable architectures (opens in a new tab)

  2. Nonblocking Memory Refresh

    Since its inception half a century ago, DRAM has required dynamic/active refresh operations that block read requests and decrease performance. We propose refreshing DRAM in the background without stalling read accesses to refreshing memory blocks, similar to the static/background refresh in SRAM. …

    vt Repository record for Nonblocking Memory Refresh (opens in a new tab)