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Showing 1 to 20 of 346 for “"DSP"”.

  1. Automatic Optimization of DSP Algorithms

    After presenting the translation and optimization techniques utilized by the SPL compiler, empirical data is presented showing the efficiency of the resulting C/FORTRAN code. Timings are compared, using fast Fourier transform (FFT), Walsh-Hadama transform (WHT), discrete cosine transform (DCT) and …

    uiuc Repository record for Automatic Optimization of DSP Algorithms (opens in a new tab)

  2. A handheld DSP based vibration analyzer

    This dissertation investigates the design and implementation of a hand held vibration analyzer for use on electrical rotating machinery. The analyzer gathers data from an accelerometer and can present either acceleration, velocity or displacement information. Any information can be presented to the …

    cape-town Repository record for A handheld DSP based vibration analyzer (opens in a new tab)

  3. A micropower DSP for sensor applications

    … This thesis describes the design of a micropower DSP intended for medium bandwidth microsensor applications (such as acoustic sensing and tracking) which achieves 4 MIPS performance at 40 [mu]W (10 pJ per instruction) operating at 450 mV and fabricated in 90 nm CMOS. Energy efficiency …

    mit Repository record for A micropower DSP for sensor applications (opens in a new tab)

  4. A high performance multiprocessor DSP system

    Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.

    mit Repository record for A high performance multiprocessor DSP system (opens in a new tab)

  5. Structural testbench development for DSP models

    Generation of test benches for large DSP behavioral models is a complicated, labor intensive task. Also, tests generated manually satisfy no formal definition of completeness. To address these needs, high level approaches to test bench development are employed which relieve the modeler of the …

    vt Repository record for Structural testbench development for DSP models (opens in a new tab)

  6. Behavioral testbench development for DSP models

    Generation of testbenches for large DSP behavioral models is a complicated, labor intensive task. Also, tests generated manually satisfy no formal definition of completeness. To address these needs, high level approaches to test bench development are employed which relieve the modeler of the …

    vt Repository record for Behavioral testbench development for DSP models (opens in a new tab)

  7. Texas Instruments DSP Dynamic Run-Time Loader

    … in applications of Digital Signal Processors (DSP) are reaching the limits of the basic method of statically loading libraries. These statically loaded libraries are fixed to the location in memory where they can be executed. Therefore these inflexible libraries are difficult to use in …

    mit Repository record for Texas Instruments DSP Dynamic Run-Time Loader (opens in a new tab)

  8. Variable supply voltage for low power DSP

    Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.

    mit Repository record for Variable supply voltage for low power DSP (opens in a new tab)

  9. An optimizing C compiler for DSP architectures

    Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.

    mit Repository record for An optimizing C compiler for DSP architectures (opens in a new tab)

  10. Efficient Binary Field Multiplication on a VLIW DSP

    … ARM Cortex A8 to a specialized C64x+ VLIW DSP, we are able to exploit the XOR-Multiply instruction and the inherent parallelism of the DSP. The proposed multiplication utilizes Multi-Precision Binary Polynomial Multiplication with Unbalanced Exponent Modular Reduction. The resulting DSP

    vt Repository record for Efficient Binary Field Multiplication on a VLIW DSP (opens in a new tab)

  11. A DSP IMPLEMENTATION OF A SUBSCRIBER LOOP TESTER

    … tester based on a digital signal processing (DSP) chip, replacing the old analog-based testers. The DSP chip uses an analog-digital converter (ADC) to take sample measurements of various signals on the subscriber loop and a digital-analog converter (DAC) to output control signals. Various …

    sask Repository record for A DSP IMPLEMENTATION OF A SUBSCRIBER LOOP TESTER (opens in a new tab)

  12. Softcore stream processor for FPGA-based DSP / Peng Wang

    Modern DSP applications present increasingly high computational requirements and keep evolving in nature. In these applications (e.g. high definition video, wireless communication), there are fundamental DSP kernels playing central roles, including Fast Fourier Transform (FFT), Matrix …

    qu-belfast Repository record for Softcore stream processor for FPGA-based DSP / Peng Wang (opens in a new tab)

  13. DESIGN OF A MULTI DSP SYSTEM FOR IMAGE PROCESSING

    … of a multi digital signal processor (DSP) system for performing parallel image processing is described. Considering the characteristics of image problems and addressing their computation and communication needs, a data flow linear array pipeline communication network is chosen for the …

    nus Repository record for DESIGN OF A MULTI DSP SYSTEM FOR IMAGE PROCESSING (opens in a new tab)

  14. A FPGA/DSP based ultrasound system for tumor detection

    … Gate Array (FPGA) and Digital Signal Processor (DSP) technologies. The proposed detection system utilizes Low Transient Pulse (LTP) technique. In this co-design architecture, the DSP carries out analysis of received demodulated signal at a lower speed while the FPGA runs at 62.5MHz for the …

    njit Repository record for A FPGA/DSP based ultrasound system for tumor detection (opens in a new tab)

  15. Entwicklung, Simulation und formale Verifikation eines optimierten DSP-Kerns

    … Aufbau. Das entwickelte und vorgestellte DSP-Design kann diese geforderten Bedingungen erfüllen.<br/>Die Ausarbeitung präsentiert zunächst die entwickelte Befehlssatzarchitektur in Hinblick auf FIR- und FFT-Algorithmen als Zielapplikationen für den DSP-Kern.Weiterhin wird nach einer …

    kings Repository record for Entwicklung, Simulation und formale Verifikation eines optimierten DSP-Kerns (opens in a new tab)

  16. Efficient arithmetic for high speed DSP implementation on FPGAs

    … and services for the real time implementation of DSP and RF systems. The field programmable gate array (FPGA) is being used increasingly in the field of DSP. This is due to the fact that the parallel computing power of such devices is ideal for today’s truly demanding DSP algorithms. Algorithms …

    glasgow Repository record for Efficient arithmetic for high speed DSP implementation on FPGAs (opens in a new tab)

  17. Investigation of the Dimensional Stability in DSP Cement Paste

    In the second half of this work, thermal expansion property was systematically investigated for cement pastes with a wide range of microstructure features. It was found that saturated paste behaves anomalouly in response to temperature change, i.e., the thermal expansion is followed by a …

    uiuc Repository record for Investigation of the Dimensional Stability in DSP Cement Paste (opens in a new tab)

  18. A lightweight DSP framework for OMAP3530-driven embedded devices

    … provides a lightweight framework, called MiniDSP, for OMAP3530 heterogeneous dual core SoC to run tasks on its DSP co-processor. This framework is composed of a minimal DSP kernel and a set of programs which run on the ARM A8 master processor. The minimal kernel maintains system stability and …

    uiuc Repository record for A lightweight DSP framework for OMAP3530-driven embedded devices (opens in a new tab)

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