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Receiver equalization for a 10 gigabit per second high-speed serial link in 65 nm CMOS technology

Rajwardan, AshwaryaUniversity of Illinois at Urbana-Champaign2019

… equalization techniques for a 10 Gbps USB 3.1 link in 65 nm CMOS technology. Two types of equalizers are implemented: a continuous time linear equalizer (CTLE) and a 1-tap full-rate decision feedback equalizer (DFE). The combined CTLE and DFE architecture is simulated with an rms receiver clock …

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