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Showing 1 to 1 of 1 for “"DCDL"”.
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Circuits for time-domain signal processing
… high resolution digitally controlled delay line (DCDL). Background calibration is used to correct interstage gain errors and sequential switching is used to reduce DCDL non-linearity. Fabricated in 65nm CMOS process, the prototype DTC achieves 1.65ps peak integral non-linearity (INL) while …