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Showing 1 to 1 of 1 for “"Constant voltage illumination stress"”.
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Influence of SiNx/Si interface states on Si solar cells
… MOS capacitor when it was subjected to a constant voltage stress (CVS) of +10V at room temperature. The interface trap density (D_{it}) across the SiN:H/n^+-Si interface increased from 6.3 x 10^9 to 7.5 x 10^9 cm^{-2} eV^{-1} after a 500-second stress whereas the n^+/p junction diode …