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Showing 1 to 4 of 4 for “"Compute-in-Memory"”.

  1. Algorithm–Hardware Co-Design Of Digital Compute-In-Memory Architecture Supporting Flexible And Temporal N:M Sparsity

    Foundational models continue to grow in size and capability, increasing demands on memory, energy, and computation. This has motivated algorithm–hardware co-design approaches for efficient inference, with structured N:M sparsity emerging as a promising method to reduce overhead. However, fixed …

    gatech Repository record for Algorithm–Hardware Co-Design Of Digital Compute-In-Memory Architecture Supporting Flexible And Temporal N:M Sparsity (opens in a new tab)

  2. A Full System Co-Simulation Platform for Evaluating Edge Machine Learning Inference Using Compute-in-Memory

    … a full-system co-simulation platform for evaluating embedded machine learning (ML) inference using compute-in-memory (CIM). CIM architectures aim to reduce data movement overhead by performing matrix operations in memory, but end-to-end benefits depend on system-level integration costs that are …

    chapman Repository record for A Full System Co-Simulation Platform for Evaluating Edge Machine Learning Inference Using Compute-in-Memory (opens in a new tab)

  3. Secure Circuits: Efficient hardware countermeasures against physical side-channel attacks

    The adoption of Artificial Intelligence (AI) and IoT devices has seen unprecedented growth in recent times. AI engines demand more processing capabilities while simultaneously handling sensitive user information and proprietary IP. Concurrently, IoT devices generate vast amounts of sensitive data, …

    rice Repository record for Secure Circuits: Efficient hardware countermeasures against physical side-channel attacks (opens in a new tab)

  4. CHARACTERIZATION OF SNEAK PATH CURRENT EFFECT IN A PEDOT: PSS-BASED ReRAM CROSSBAR ARRAY

    … experimental characterization of resistive switching memory crossbar devices fabricated on glass substrates with a structure of Cu/PEDOT: PSS/Ag, with a particular focus on understanding the impact of sneak-path currents on the switching performances. Resistive memory cells, particularly in

    washington Repository record for CHARACTERIZATION OF SNEAK PATH CURRENT EFFECT IN A PEDOT: PSS-BASED ReRAM CROSSBAR ARRAY (opens in a new tab)