Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 14 of 14 for “"Code Transformation"”.
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Polyhedral Code Transformation for Julia
Central processing unit (CPU) code performance is highly dependent on instruction and data parallelism. Instruction parallelism is largely focused on CPU cores and threading, while data parallelism relies on specialized vectors. Single-instruction, multiple-data (SIMD) vectors allow for a single …
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Automatic Source Code Transformation To Pass Compiler Optimization
… equivalence between the original and optimized code versions, a requirement typically established through the compiler's static analysis. When this condition is not met, the compiler will miss the optimization. The process of manually rewriting the source code to pass an already missed compiler …
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Compiler-assisted rollback recovery
… three compiler capabilities are applied: (1) code insertion, (2) code analysis, and (3) code transformation.
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Compiler Cost Model for Multicore Architectures
… application programmer or compiler as to which code transformation is needed in order to decrease this negative performance impact. Unfortunately, the current state-of-the-art compilers such as Open64 and GNU are oblivious to these performance bottlenecks stated above. Even though these …
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Methodologies, Techniques, and Tools for Understanding and Managing Sensitive Program Information
… and locating the SPI for any realistically sized codebase by hand is hard; (2) manually isolating SPI to protect it is burdensome and error-prone; (3) if SPI is passed across distributed components within and across devices, it becomes vulnerable to security and privacy attacks. To address these …
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The exploitation of pipeline parallelism by compile time dataflow analysis
The automatic and implicit transformation of sequential instruction streams, which execute efficiently for pipelined architectures is the subject of this paper. This paper proposes a method which maximizes the parallel performance of an instruction pipeline by detecting and eliminating specific …
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A prototype parallel multi-FPGA accelerator for SPICE CMOS model evaluation
… evaluation phase within the SPICE simulator. A code transformation flow which converts the high-level device model code to structural VHDL was also implemented. This flow showed that an automatic compiler system to design, map, and optimise SPICE-like simulations on FPGAs is …
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Compilation and Scheduling Techniques for Embedded Systems
… this trend, memory requirement reduction through code compaction and variable coalescing techniques are gaining more ground. Also, as the current trend in complex embedded systems of using multiprocessor system-on-chip (MPSoC) grows, problems like mapping, memory management and scheduling are …
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Accelerating Practical Engineering Design Optimization with Computational Graph Transformations
… design optimization frameworks called code transformations. Code transformations encompass a variety of computational-graph-based scientific computing strategies (e.g., automatic differentiation, automatic sparsity detection, problem auto-scaling) that automatically analyze, augment, …
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Mapping numerical software onto distributed memory parallel systems
… tools to aid scalar software porting. The ported code must not only efficiently exploit available parallel processing speed and distributed memory, but also enable existing users of the scalar code to use the parallel version with identical inputs and allow maintenance to be performed by the …
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Practical Feedback and Instrumentation Enhancements for Performant Security Testing of Closed-source Executables
… contains 25 bugs for every 1,000 lines of code, the prompt discovery of security flaws is now vital to mitigating the next major cyberattack. Over the last decade, the software industry has overwhelmingly turned to a lightweight defect discovery approach known as fuzzing: automated testing …
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A Compiler Framework to Support and Exploit Heterogeneous Overlapping-ISA Multiprocessor Platforms
As the demand for ever increasingly powerful machines continues, new architectures are sought to be the next route of breaking past the brick wall that currently stagnates the performance growth of modern multi-core CPUs. Due to physical limitations, scaling single-core performance any further is …
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Adaptation of the MapReduce programming framework to compute-intensive data-analytics kernels
… in GPUs. The first is loop maximizing, a code transformation for GPUs that can eliminate code flow divergence (and hence serialization in GPUs) and result in better usage of GPU processing elements. Using this technique, we have achieved the highest reported speedups for gene alignment …
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Techniques for enabling GPU code generation of low-level optimizations and dynamic parallelism from high-level abstractions
… programmers to invest resources in porting their codes to be GPU compatible. Currently, there are multiple ways to target GPUs for computations. From low-level C style syntax that provides for full control and most performance at the cost of slow code-development times to High-level DSLs that can …