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Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.

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Showing 1 to 20 of 23 for “"Central processing unit (CPU)"”.

  1. Virtual machine detection through Central Processing Unit (CPU) detail anomalies

    … that looks for inconsistencies in the following Central Processing Unit (CPU) details: the CPU model, the number of physical cores, the number of logical cores and the cache capacities. Should inconsistencies be detected, a virtual machine is present. We explore our method in scenarios where all …

    uoit Repository record for Virtual machine detection through Central Processing Unit (CPU) detail anomalies (opens in a new tab)

  2. Accelerating path planning algorithms with high level synthesis tools and FPGAs.

    … performance increases over using a traditional central processing unit (CPU). Converting an algorithm to run on an FPGA is a complicated and time consuming process. This thesis develops and verifies a design framework that demonstrates how to design a path planning algorithm in a high level …

    baylor Repository record for Accelerating path planning algorithms with high level synthesis tools and FPGAs. (opens in a new tab)

  3. RFID ROI

    … may help a manufacturer better align supply with central processing unit (CPU) demand. The resulting economic benefits are explored through yield scenarios. It is important to note that the thesis explores this topic without the benefit of empirical data. Consequently, a number of assumptions were …

    mit Repository record for RFID ROI (opens in a new tab)

  4. High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware

    … to multi-core systems with several hundreds of processing elements. In this dissertation, I address how the performance of modern processing systems can be improved, while attempting to reduce hardware complexity and energy consumptions. My research described here tackles both central processing

    unt Repository record for High Performance Architecture using Speculative Threads and Dynamic Memory Management Hardware (opens in a new tab)

  5. Polyhedral Code Transformation for Julia

    Central processing unit (CPU) code performance is highly dependent on instruction and data parallelism. Instruction parallelism is largely focused on CPU cores and threading, while data parallelism relies on specialized vectors. Single-instruction, multiple-data (SIMD) vectors allow for a single …

    mit Repository record for Polyhedral Code Transformation for Julia (opens in a new tab)

  6. Applying a MEIO approach to manage Intel's VMI Hub Supply

    … Managed Inventory (VMI) hub process for its Central Processing Unit (CPU) Finished Good (FG) inventory, which allows Intel's customers to pull inventory directly from the hubs. However, this process change resulted in increased inventory in Intel's overall supply chain and thus increased …

    mit Repository record for Applying a MEIO approach to manage Intel's VMI Hub Supply (opens in a new tab)

  7. A low power and fast CMOS arithmetic logic unit

    … Semiconductor (CMOS) Arithmetic Logic Unit (ALU). ALU is one of the most important parts of a digital computer which is designed to do the arithmetic and logic operations, including bit shifting operation that need to be done for almost any data that is being processed by the central

    uthm Repository record for A low power and fast CMOS arithmetic logic unit (opens in a new tab)

  8. Performance evaluation for different intrusion detection system algorithms using machine learning

    … metrics, including accuracy, precision, central processing unit (CPU) efficiency and execution time. The simulation results showed that the Decision Tree Algorithm achieved the highest precision rate by 95.5% within 42 seconds. For accuracy, it achieved 69.5% and can be considered good, …

    uthm Repository record for Performance evaluation for different intrusion detection system algorithms using machine learning (opens in a new tab)

  9. Impact of Network Address Translation on Router Performance

    … activity. It causes an increase in Central Processing Unit (CPU) and memory utilization and may impair throughput and increase the latency experienced by a packet. Thus, understanding the performance impact of NAT on a network device (in particular, a router) becomes an important …

    vt Repository record for Impact of Network Address Translation on Router Performance (opens in a new tab)

  10. Accelerating messages by avoiding copies using RDMA in an asynchronous parallel runtime system

    … data transfers without the involvement of the Central Processing Unit (CPU). In addition to not consuming CPU cycles, using RDMA also benefits from zero copy networking where the data being transferred is not copied between the layers of the network stack. Since memory performance is …

    uiuc Repository record for Accelerating messages by avoiding copies using RDMA in an asynchronous parallel runtime system (opens in a new tab)

  11. Novel Overload Reduction Framework for Intrusion Detection System in Software-Defined Networks

    … model, which was evaluated using metrics such as Central Processing Unit (CPU) and memory utilisation, response times, and traffic flow processing efficiency to measure system overload and performance.<br/>The current systems, involving centralised processing and multiple security functions, often …

    northampton Repository record for Novel Overload Reduction Framework for Intrusion Detection System in Software-Defined Networks (opens in a new tab)

  12. A Study of Disk Performance Optimization.

    … such IDE based multi-user systems, reducing the Central Processing Unit (CPU) overhead associated with disk I/O is critical to system responsiveness.</p> <p>This thesis explores the impact of PCI bus mastering Direct Memory Access (DMA) on the performance of systems with IDE drives. DMA is a data …

    etsu Repository record for A Study of Disk Performance Optimization. (opens in a new tab)

  13. Directive-Based Data Partitioning and Pipelining and Auto-Tuning for High-Performance GPU Computing

    The computer science community needs simpler mechanisms to achieve the performance potential of accelerators, such as graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and co-processors (e.g., Intel Xeon Phi), due to their increasing use in state-of-the-art supercomputers. …

    vt Repository record for Directive-Based Data Partitioning and Pipelining and Auto-Tuning for High-Performance GPU Computing (opens in a new tab)

  14. A Framework for Evaluating the Computational Aspects of Mobile Phones

    … billion dollars in the first half of 2006 in the United States alone, and an estimated 80% of the world receiving coverage for their wireless phones in that year, interest in these devices as more than mere communicators has greatly increased. In the mid-to-late 1990s, digital cameras began to be …

    usf Repository record for A Framework for Evaluating the Computational Aspects of Mobile Phones (opens in a new tab)

  15. Lattice Boltzmann modeling for shallow water equations using high performance computing

    … The parallel performance of the LBM on central processing unit (CPU) based and graphics processing unit (GPU) based high performance computing (HPC) architectures is investigated showing attractive performance in relation to speedup and scalability.

    lsu-thes Repository record for Lattice Boltzmann modeling for shallow water equations using high performance computing (opens in a new tab)

  16. PARAMETERS THAT AFFECT PARALLEL PROCESSING FOR COMPUTATIONAL ELECTROMAGNETIC SIMULATION CODES ON HIGH PERFORMANCE COMPUTING CLUSTERS

    … Computing power was initially derived from Central Processing Unit (CPU) clock speed. That changed when increases in clock speed became constrained by power requirements. Chip manufacturers turned to multicore CPU architectures and associated technological advancements to create the CPUs for …

    syracuse-diss Repository record for PARAMETERS THAT AFFECT PARALLEL PROCESSING FOR COMPUTATIONAL ELECTROMAGNETIC SIMULATION CODES ON HIGH PERFORMANCE COMPUTING CLUSTERS (opens in a new tab)

  17. GPU acceleration of the frequency domain acceleration search for binary pulsars

    Graphics processing units (GPUs) have been used to accelerate computation in a broad range of fields; this work presents a GPU-accelerated search for pulsars. Pulsars are highly magnetised neutron stars with extremely stable rotational periods. These periods can be accurately measured, which makes …

    cape-town Repository record for GPU acceleration of the frequency domain acceleration search for binary pulsars (opens in a new tab)

  18. Massively parallel engineering simulations on graphics processors: parallelization, synchronization, and approximation

    … where computation is shared among several processing units. There have been many realizations of this drive towards parallel computing platforms, spanning from multi-core processors to supercomputers with tens of thousands of computing nodes. This thesis is devoted to the study of one …

    colo-mines Repository record for Massively parallel engineering simulations on graphics processors: parallelization, synchronization, and approximation (opens in a new tab)

  19. Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design

    … processor, accomplishing such when the target CPU hardware is not actively available typically requires time-consuming CPU simulation, which is often too slow to practically consider for large programs. Additionally, while the use of SystemC modeling with TLM 2.0 standard is widely adopted for …

    uiuc Repository record for Parallel code-specific CPU simulation with dynamic phase convergence modeling for HW/SW co-design (opens in a new tab)

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