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Showing 1 to 20 of 736 for “"CPU"”.

  1. Adaptive CPU Resource Management for Multicore Platforms

    The topic of this thesis is adaptive CPU resource management for multicore platforms. The work was done as a part of the resource manager component of the adaptive resource management framework implemented in the European ACTORS project. The framework dynamically allocates CPU resources for the …

    lund Repository record for Adaptive CPU Resource Management for Multicore Platforms (opens in a new tab)

  2. Heterogeneous CPU-FPGA system framework and scheduler

    … we explore two critical aspects of heterogeneous CPU-FPGA systems within high-performance computing: the optimization of single tasks and the effective scheduling of heavy workloads. We consider systems that consist of general-purpose units such as CPUs, and specialized accelerators, such as …

    uiuc Repository record for Heterogeneous CPU-FPGA system framework and scheduler (opens in a new tab)

  3. CPU scheduling in robotics & AR/VR applications

    Robot and AR/VR systems have to take highly responsive real-time actions, driven by complex decisions involving a pipeline of sensing, perception, planning, and reaction tasks. Given constrained resources, this leads to a difficult scheduling problem. In practice – system designers manually tune …

    uiuc Repository record for CPU scheduling in robotics & AR/VR applications (opens in a new tab)

  4. Intelligent scheduling for simultaneous CPU-GPU applications

    … purpose multicore central processing units (CPU) and specialized accelerators has emerged recently. Graphics processing unit (GPU) is the most widely used accelerator. To fully utilize such a heterogeneous system’s full computing power, coordination between the two distinct devices, CPU and …

    uiuc Repository record for Intelligent scheduling for simultaneous CPU-GPU applications (opens in a new tab)

  5. Approximation of CPU code using neural networks

    … hardware ranging from central processing units (CPUs) to highly specialized application specific integrated circuits (ASICs). Most consumer CPUs are general purpose and come with mature development tools used by large communities of programmers, while ASICs can perform very specific tasks very …

    uiuc Repository record for Approximation of CPU code using neural networks (opens in a new tab)

  6. Competitive pricing and learning in CPU sockets

    An Intel processor can be electrically attached to a PC motherboard permanently or via a component called a socket. Intel defines the critical interfaces between the socket and the processor. Independent suppliers then manufacture the sockets and Intel validates the design of the sockets before …

    mit Repository record for Competitive pricing and learning in CPU sockets (opens in a new tab)

  7. The effects of carbon nanotubes on cpu cooling

    Computers today have evolved from being big bulky machines that took up rooms of space into small simple machines for net browsing and into small but complicated multi-core servers and supercomputing architectures. This has been possible due to the evolution of the processors. Today processors have …

    utc Repository record for The effects of carbon nanotubes on cpu cooling (opens in a new tab)

  8. Dynamic Workload Division in GPU-CPU Heterogeneous Systems

    … possibility of efficient. As a result, the CPU-GPU heterogeneous architecture is still the hot zone of the high performance computation. However, the energy consuming is still the bottle neck of the entire the system, when the system and its corresponding framework need massive scale …

    ohiolink Repository record for Dynamic Workload Division in GPU-CPU Heterogeneous Systems (opens in a new tab)

  9. Optimización de algoritmos bioinspirados en sistemas heterogéneos CPU-GPU.

    … producir mediante su utilización conjunta con la CPU, lo que nos lleva a introducir los sistemas heterogéneos tal y como detalla el título de este trabajo. Es en entornos heterogéneos CPU-GPU donde estos rendimientos alcanzan sus cotas máximas, ya que no sólo las GPUs soportan el cómputo …

    murcia-diss Repository record for Optimización de algoritmos bioinspirados en sistemas heterogéneos CPU-GPU. (opens in a new tab)

  10. CPU Resource Management and Noise Filtering for PID Control

    The first part of the thesis deals with adaptive CPU resource management for multicore platforms. The work was done as a part of the resource manager component of the adaptive resource management framework implemented in the European ACTORS project. The framework dynamically allocates CPU resources …

    lund Repository record for CPU Resource Management and Noise Filtering for PID Control (opens in a new tab)

  11. Automatic Parallelisation of Programs onto CPU+GPU Hybrid Systems

    … different, but what may be efficient on a CPU may be inefficient on a GPU. Furthermore, any program that contains parallel elements must be substantially re-written in order to run on a GPU architecture. This research aims to produce a system that will allow programs to be run without …

    essex Repository record for Automatic Parallelisation of Programs onto CPU+GPU Hybrid Systems (opens in a new tab)

  12. Investigation of Alternative Power Architectures for CPU Voltage Regulators

    … Previously the two-stage VR was only used as a CPU VR. The two-stage concept can also be applied to other systems. In this dissertation, the two-stage power architecture is applied to two different applications: laptop computers and high-end server microprocessors. The common characteristics of …

    vt Repository record for Investigation of Alternative Power Architectures for CPU Voltage Regulators (opens in a new tab)

  13. Design and evaluation of an optimistic CPU: the warp engine

    Instruction pipelining, out-of-order execution, and branch prediction are techniques that improve performance in processors by manipulating the flow of instructions. These control flow manipulations alone are not adequate to allow large numbers of instructions to execute in parallel because …

    waikato-masters Repository record for Design and evaluation of an optimistic CPU: the warp engine (opens in a new tab)

  14. Virtual machine detection through Central Processing Unit (CPU) detail anomalies

    … in the following Central Processing Unit (CPU) details: the CPU model, the number of physical cores, the number of logical cores and the cache capacities. Should inconsistencies be detected, a virtual machine is present. We explore our method in scenarios where all CPU cores are assigned to …

    uoit Repository record for Virtual machine detection through Central Processing Unit (CPU) detail anomalies (opens in a new tab)

  15. Efficient Precise Dynamic Data Race Detection For Cpu And Gpu

    … a disparate programming and execution model from CPU workloads. Further, this dissertation shows how the structured synchronization model in GPU programs can simplify the algorithm design of data race detection for GPU, and how the unique patterns in GPU workloads enable an efficient …

    penn Repository record for Efficient Precise Dynamic Data Race Detection For Cpu And Gpu (opens in a new tab)

  16. A distributed CPU-GPU framework for large-scale pairwise alignment

    … for accelerating these computations. As such, CPU-GPU clusters can enable all-against-all comparisons on large datasets. This thesis presents a hybrid MPI-CUDA framework for computing multiple pairwise sequence alignments on CPU-GPU clusters. The design targets both homogeneous and …

    missouri Repository record for A distributed CPU-GPU framework for large-scale pairwise alignment (opens in a new tab)

  17. Auto-parallelization of machine-learning dataflow graphs for CPU multicores

    Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2025-08-01

    uiuc Repository record for Auto-parallelization of machine-learning dataflow graphs for CPU multicores (opens in a new tab)

  18. Profiling and characterization of deep learning model inference on CPU

    … MKL-DNN help to boost the performance on Intel CPU. We develop a profiling mechanism to capture the MKL-DNN operation calls and formulate the tracing timeline with spans on the server. Through profiling and characterization that give insights into Intel MKL-DNN, we evaluate and demonstrate that …

    uiuc Repository record for Profiling and characterization of deep learning model inference on CPU (opens in a new tab)

  19. PCBleed: Fuzzing for CPU Bugs Through Use of Performance Counters

    … due to the large and complex design of current CPUs, resulting in a substantial search space and numerous unknowns. This thesis proposes leveraging software fuzzing methods for hardware testing, focusing on the automated generation of instruction sequences that reveal hardware vulnerabilities. …

    mit Repository record for PCBleed: Fuzzing for CPU Bugs Through Use of Performance Counters (opens in a new tab)

  20. Achieving high CPU efficiency and low tail latency in datacenters

    … other hand, datacenter operators require high CPU efficiency in order to reduce operating costs. Unfortunately, today's systems do a poor job of providing low latency and high CPU efficiency simultaneously. This dissertation presents Shenango, a system that improves CPU efficiency while …

    mit Repository record for Achieving high CPU efficiency and low tail latency in datacenters (opens in a new tab)

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