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Showing 1 to 14 of 14 for “"CMOS integrated circuits"”.

  1. Design considerations for minimizing noise in micropower CMOS integrated circuits

    Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.

    mit Repository record for Design considerations for minimizing noise in micropower CMOS integrated circuits (opens in a new tab)

  2. Design and Analysis of an Adaptive Asynchronous System Architecture for Energy Efficiency

    … become a critical design parameter for digital CMOS integrated circuits. With performance still garnering much concern, a central idea has emerged: minimizing power consumption while maintaining performance. The use of dynamic voltage scaling (DVS) with parallelism has shown to be an effective …

    arkansas Repository record for Design and Analysis of an Adaptive Asynchronous System Architecture for Energy Efficiency (opens in a new tab)

  3. Circuitos digitais e mistos CMOS com aplicação em medidor de energia

    The design of digital and mixed CMOS integrated circuits for energy meters is required in applications where energy measurement systems are installed with fast processing and low power consumption. The great challenge is to understand its operation and investigate topologies and/or design …

    brazil-uerj Repository record for Circuitos digitais e mistos CMOS com aplicação em medidor de energia (opens in a new tab)

  4. Low threshold vertical cavity surface emitting lasers integrated onto Si-CMOS ICs using novel hybrid assembly techniques

    … surface emitting lasers (VCSELs) on silicon CMOS integrated circuits for optical interconnect applications. Individual oxide-apertured 850 nm AlGaAs VCSEL micro-devices discs, 8 Ctm tall and 55 ptm in diameter (pills), have been both bonded and electrically contacted within the dielectric …

    mit Repository record for Low threshold vertical cavity surface emitting lasers integrated onto Si-CMOS ICs using novel hybrid assembly techniques (opens in a new tab)

  5. Temperature and Interconnect Aware Unified Physical and High Level Synthesis

    Aggressive scaling of nanoscale CMOS integrated circuits has created significant design challenges arising from increasing power densities, thermal concerns, and rising wire delays. The main contribution of this dissertation is the development of unified physical and high-level synthesis techniques …

    usf Repository record for Temperature and Interconnect Aware Unified Physical and High Level Synthesis (opens in a new tab)

  6. Frequency dividers design for multi-GHz PLL systems

    … divider has been implemented in a 90 nm standard CMOS technology. To the extent of maximizing the operative input frequency, the higher frequency digital blocks of the frequency divider have been realized using dynamic precharge-evaluation logic. Moreover, a non-conventional method to implement …

    gatech Repository record for Frequency dividers design for multi-GHz PLL systems (opens in a new tab)

  7. Developing digital and analog spiking neural Networks for interacting with biological Tissues in the Case Study of temporal lobe Epilepsy

    … designing a spiking neural network (SNN) using CMOS integrated circuits (ICs) with memristors to demonstrate its potential for pattern recognition tasks. To facilitate the implementation of the SNN, memristors were chosen as synaptic components due to their emerging properties and potential …

    sevilla Repository record for Developing digital and analog spiking neural Networks for interacting with biological Tissues in the Case Study of temporal lobe Epilepsy (opens in a new tab)

  8. Highly Efficient Neuromorphic Computing Systems With Emerging Nonvolatile Memories

    … integration: (a) the analog/digital interface circuits dominate the power and area in such mixed-signal designs; (b) they are highly customized and can only compute a class of neural network models once developed; (c) non-ideal device properties largely forfeit the benefit in terms of …

    duke Repository record for Highly Efficient Neuromorphic Computing Systems With Emerging Nonvolatile Memories (opens in a new tab)

  9. Development of Low-power Wireless Sensor Nodes based on Assembled Nanowire Devices

    … complementary-metal-oxide-semiconductor (CMOS) integrated circuits using a technique called dielectrophoretic (DEP) assembly; and (2) design of a low-power SiGe BiCMOS multi-band ultra-wideband (UWB) transmitter for wireless communications with other nodes and/or a central control unit in …

    vt Repository record for Development of Low-power Wireless Sensor Nodes based on Assembled Nanowire Devices (opens in a new tab)

  10. A compact model for silicon controlled rectifiers in low voltage CMOS processes

    … SCR compact model for simulating ESD protection circuits. The aspects of the compact model that are necessary to reproduce measurement data, such as quasi-static I-V curves and transient voltage overshoot, are discussed. These aspects include conductivity modulation of the well resistances in the …

    uiuc Repository record for A compact model for silicon controlled rectifiers in low voltage CMOS processes (opens in a new tab)

  11. Asymmetric interleaving in low-voltage CMOS power management with multiple supply rails

    Recent years have seen the proliferation of electronic devices that require multi-phase power converters to provide heterogeneous power rails to different systems. Typical systems will utilize symmetric interleaving as a method of reducing the input current ripple for the power converter. …

    uiuc Repository record for Asymmetric interleaving in low-voltage CMOS power management with multiple supply rails (opens in a new tab)

  12. Highly Tunable Integrated Self-Interference Cancellation Techniques for Intelligent Full-duplex Radios

    … This dissertation explores and implements integrated FD radio front-end solutions designed to mitigate SI and enhance data rates. The research focuses on developing SI cancellation techniques with high tunability, broad cancellation bandwidth, deep cancellation depth, and fast configuration …

    washington Repository record for Highly Tunable Integrated Self-Interference Cancellation Techniques for Intelligent Full-duplex Radios (opens in a new tab)