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Showing 1 to 18 of 18 for “"C-Compiler"”.

  1. An optimizing C compiler for DSP architectures

    Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.

    mit Repository record for An optimizing C compiler for DSP architectures (opens in a new tab)

  2. Introducing Non-Determinism to the Parallel C Compiler

    … the continuing project of updating<br />the PC Compiler. The goal is to test the viability of using “shortcutting”<br />functions. Parallel programs with the ability to shortcut can be generated<br />by the updated version of the PC Compiler. In addition, this project introduces<br />the ability …

    csusb Repository record for Introducing Non-Determinism to the Parallel C Compiler (opens in a new tab)

  3. Adding Support for MC/DC instrumentation in the Green Hills C/C++ compiler

    … (MC/DC) instrumentation in the Green Hills C/C++ compiler. When a specfic option is enabled, the compiler now identied each boolean expression and annotates the generated binary with special instructions. When a test suite is run, these extra instructions emit logging information. A separate …

    mit Repository record for Adding Support for MC/DC instrumentation in the Green Hills C/C++ compiler (opens in a new tab)

  4. C compiler aided design of application specific instruction set processors using the machine description language LISA

    … in a case study: The impact of incorporating a C compiler in the architecture exploration phase with respect to the processor architecture, the design time and the system reusability was analyzed. Another goal of this thesis was the (semi)automatic retargeting of a compiler from a LISA processor …

    aachen Repository record for C compiler aided design of application specific instruction set processors using the machine description language LISA (opens in a new tab)

  5. Rule-based optimization with K-framework

    The thesis discusses pre-compiler optimization using rule-based rewriting. Our goal is to facilitate the proof of correctness of the process of program optimization. A source-to-source optimizer based on the proposed strategy can be a preprocessor to a certified compiler such as CompCert and this …

    uiuc Repository record for Rule-based optimization with K-framework (opens in a new tab)

  6. Characterizing the Effectiveness of Compilers in Vectorizing Polyhedrally Transformed Code

    … tiling schemes namely, PLuTo and PTile, with two compilers namely, the GNU C Compiler and the Intel C Compiler.

    ohiolink Repository record for Characterizing the Effectiveness of Compilers in Vectorizing Polyhedrally Transformed Code (opens in a new tab)

  7. The communication network simulator for Concordia parallel programming environment

    … is composed of two parts, Concordia Parallel C Compiler (CPCC), which compiles a parallel program into machine code (vCode), and Concordia Parallel System Simulator (CPSS), which executes the vCode generated by CPCC. The communication network simulator, as an important module in CPSS, simulates …

    concordia Repository record for The communication network simulator for Concordia parallel programming environment (opens in a new tab)

  8. Compiler support for multiple-instruction-issue architectures

    … architectures with the support of an optimizing compiler. We have constructed a full-scale C compiler that can learn the dynamic behavior of user programs by profiling, apply the profile information to guide various code improving techniques, and map the program parallelism onto the parallel …

    uiuc Repository record for Compiler support for multiple-instruction-issue architectures (opens in a new tab)

  9. Compilation and Generation of Multi-Processor on a Chip Real-Time Embedded Systems

    … ANSI-C code is presented. The Small Device C Compiler (SDCC) was retargeted to the RTP architecture and extended to produce a generator directive file. The RTPGen hardware generator was created to consume the directive file and produce a highly customized top-level structural VHDL file that …

    byu Repository record for Compilation and Generation of Multi-Processor on a Chip Real-Time Embedded Systems (opens in a new tab)

  10. Control of the hybrid engine of the REMUS 600

    … All these processes were done through a PIC C compiler and a microcontroller. Testing revealed that it took 10.3 +/- 0.2 and 113.6 +/- 1.7 steps to open the choke and throttle respectively and 4.5 + 0.1 and 206.4 +/- 2.2 to close the choke and throttle respectively. Code to perform the …

    mit Repository record for Control of the hybrid engine of the REMUS 600 (opens in a new tab)

  11. Concordia parallel C : design and implementation

    … of Concordia Parallel C (CPC) and its compiler Concordia Parallel C Compiler (CPCC). The Concordia Parallel Programming Environment (CPPE) is a novel parallel programing environment supporting virtual-architecture parallel programming paradigm, program and library development, simulated …

    concordia Repository record for Concordia parallel C : design and implementation (opens in a new tab)

  12. PIC 18F452 implementation of digital filters

    … code is generated for the popular CCS PIC C-Compiler. In is the intent of this research to learn whether FIR filters can be made computationally viable on the PIC18 chips, can they run stably with reliable and repeatable performance? What is the minimum execution time possible at the …

    wvu Repository record for PIC 18F452 implementation of digital filters (opens in a new tab)

  13. Investigations into implementation of an iterative feedback tuning algorithm into microcontroller

    … large memory, in-built ADC & DAC and C compiler type are the key parameters qualifying for its usage. The Analog Devices ARM7024 microcontroller was chosen as an alternative to the DSP56F807C where it is not available. Myopic Unfalsified Control (MUC) is noted to be similar to IFT since …

    cape-town Repository record for Investigations into implementation of an iterative feedback tuning algorithm into microcontroller (opens in a new tab)

  14. Formally Verified Code Obfuscation in the Coq Proof Assistant

    … by discussing CompCert, a formally verified C compiler in Coq, along with work that has been done on obfuscation there, and muse on the possibility of implementing formal methods in the next generation of real-world obfuscation tools.

    ottawa-retro Repository record for Formally Verified Code Obfuscation in the Coq Proof Assistant (opens in a new tab)

  15. Computer model of hybrid compensator of fast varying loads

    … computer model was implemented in MFC Visual C++ compiler version 6.0. The classification of fast varying loads and effects of their operation in distribution systems were described in this dissertation. The power properties of fast varying loads were expressed in terms of the Currents' Physical …

    lsu-thes Repository record for Computer model of hybrid compensator of fast varying loads (opens in a new tab)

  16. An empirical study of a novel technique : rationed-memory compiling

    … whenever a program requests a memory block, the compiler returns a block smaller than the requested size. The compiler handles subsequent reads and writes to the memory block as usual if the accessed location is within the allocated block. If the accessed location is outside the allocated block, …

    mit Repository record for An empirical study of a novel technique : rationed-memory compiling (opens in a new tab)

  17. Extending old languages for new architectures

    … Since architectures change frequently, and compilers last for a long time, it is clear that compilers should be designed to be extensible. This thesis argues that to support evolving architectures a compiler should support the creation of high-level language extensions. In particular, it …

    cambridge Repository record for Extending old languages for new architectures (opens in a new tab)

  18. Retargetable code generation based on an architecture description language

    … retargetable software development tools (C-compiler, assembler, linker, simulator etc.) that can be quickly adapted to varying target processor configurations. Such tools are usually driven by a processor model given in a dedicated Architecture Description Language (ADL). Advanced ADLs are …

    aachen Repository record for Retargetable code generation based on an architecture description language (opens in a new tab)