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Showing 1 to 20 of 20 for “"Boolean logic"”.

  1. An Algorithm for multi-output Boolean logic minimization

    … absolute minimal solution to the problem of Boolean Logic Minimization in its most generalized form of multi-output function with arbitrary cost criterion. The proposed algorithm is shown to be tighter than the Quine-McCluskey method in its ability to eliminate redundant prime implicants, …

    vt Repository record for An Algorithm for multi-output Boolean logic minimization (opens in a new tab)

  2. A systematic analysis of defenses against code reuse attacks

    … were represented as propositional statements in boolean logic and the possibility of deploying malware was a satisfiability instance. We use the model to analyze the space in two ways: we analyze the defense configurations of a real-world system and we reason about hypothetical defense bypasses. …

    mit Repository record for A systematic analysis of defenses against code reuse attacks (opens in a new tab)

  3. Asynchronous logic automata

    … the spatially concurrent, asynchronous nature of logic, scaling down in size and up in complexity becomes significantly easier. In particular, we introduce "asynchronous logic automata", which are a specialization of both asynchronous cellular automata and Petri nets, and include Boolean logic

    mit Repository record for Asynchronous logic automata (opens in a new tab)

  4. Automatic verification of VHDL models

    … by the designer in Modified Linear Time Temporal Logic,. which is an extension to traditional boolean logic and can describe timing relation between signals. A semantic similarity between temporal operators and VHDL timings and delays has been drawn and an algorithm for comparing the VHDL model …

    vt Repository record for Automatic verification of VHDL models (opens in a new tab)

  5. Tri-State Boolean Satisfiability with Commit: An Efficient Partial Solution Using Hyperlogic

    … present two implementation enhancements for the Boolean satisfiability problem and one visualization technique. The first is an expansion to a tri-nary logic system with a commit phase. The three states are (1) true, (2) false, and (3) don't care. We abstracted the operations of AND and OR to …

    usm Repository record for Tri-State Boolean Satisfiability with Commit: An Efficient Partial Solution Using Hyperlogic (opens in a new tab)

  6. Computing and the electrical transport properties of coupled quantum networks

    … leads to interesting applications for digital logic and computing circuits. The work specifically looks at characterizing a few main areas that would be of interest to experimentalists who are working in nanostructure devices, and is organized as a series of papers. The first paper analyzes …

    must-thes Repository record for Computing and the electrical transport properties of coupled quantum networks (opens in a new tab)

  7. Computation by block copolymer self-assembly

    … and template design. Finally, we design simple Boolean logic gates as a proof-of-concept demonstration of computation.

    mit Repository record for Computation by block copolymer self-assembly (opens in a new tab)

  8. Photonic integrated circuits for optical logic applications

    The optical logic unit cell is the photonic analog to transistor-transistor logic in electronic devices. Active devices such as InP-based semiconductor optical amplifiers (SOA) emitting at 1550 nm are vertically integrated with passive waveguides using the asymmetric twin waveguide technique and …

    mit Repository record for Photonic integrated circuits for optical logic applications (opens in a new tab)

  9. Towards dissecting neural ensembles : development of genetic profiling and targeting approaches

    … specific marker genes and compute complex Boolean logic to label these cells specifically. As a proof of principle, we demonstrate that the synthetic circuit achieves classification of two cell lines based on their gene expression profiles with high accuracy. Third, we provide a design of …

    mit Repository record for Towards dissecting neural ensembles : development of genetic profiling and targeting approaches (opens in a new tab)

  10. Potential Silvicultural Effects on Bald Eagle Nesting Substrate and Economic Yields at a Navy Installation in the Chesapeake Bay: An Approach Using the Forest Vegetation Simulator and Mahalanobis Distance

    … on cumulative distribution functions (CDFs) and Boolean logic allowed evaluation of the strengths and weaknesses of the Mahalanobis distance method. The Mahalanobis distance model provided greater relative fit to the sample of nest sites compared to the CDF model but had lower discriminating …

    vt Repository record for Potential Silvicultural Effects on Bald Eagle Nesting Substrate and Economic Yields at a Navy Installation in the Chesapeake Bay: An Approach Using the Forest Vegetation Simulator and Mahalanobis Distance (opens in a new tab)

  11. Synthesis of stochastic learning automata.

    … analogue functions, effectively transformed into Boolean logic operations, to be performed at high speed by conventional digital hardware. These techniques were seen as ideally suited to the practical implementation of stochastic learning automata. This project is seen as the convergence of these …

    rgu Repository record for Synthesis of stochastic learning automata. (opens in a new tab)

  12. A land evaluation model for irrigated crops using multi-criteria analysis.

    … using multi-criteria analysis (MCA) of fuzzy logic and the Analytical Hierarchy Process (AHP). In the MCA, fourteen land suitability factors including twelve soil characteristics, topography and erosion hazard were evaluated. Local experts used their experience and assigned different weights …

    sheffield-hallam Repository record for A land evaluation model for irrigated crops using multi-criteria analysis. (opens in a new tab)

  13. Pandora : a logic for the qualitative analysis of temporal fault trees

    … an important role, because fault trees use only Boolean logic and so there is no simple way of representing time or sequences of events in a fault tree. Although there have been attempts to extend FTA to enable analysis of such systems, most have focused on probabilistic analysis and there …

    hull Repository record for Pandora : a logic for the qualitative analysis of temporal fault trees (opens in a new tab)

  14. BOOLEAN AND BRAIN-INSPIRED COMPUTING USING SPIN-TRANSFER TORQUE DEVICES

    … can be explored in compact, low power memory and logic design. In order to truly leverage STT devices based computing, researchers require a re-think of circuit, architecture, and computing model, since the STT devices are unlikely to be drop-in replacements for CMOS. The potential of STT devices …

    purdue-thes Repository record for BOOLEAN AND BRAIN-INSPIRED COMPUTING USING SPIN-TRANSFER TORQUE DEVICES (opens in a new tab)

  15. Novel RTD-Based Threshold Logic Design and Verification

    … suitable for implementing threshold logic rather than Boolean logic which has dominated CMOS technology in the past. To fully take advantage of such emerging nanotechnology, efficient design methodologies and design automation tools for threshold logic therefore become essential. In …

    vt Repository record for Novel RTD-Based Threshold Logic Design and Verification (opens in a new tab)

  16. Analysis of Photonic Structures for Optical Networks

    … Programable Óptica (Optically Programmable Logic Cell, OPLC) basadas en Láseres de Pozo Cuántico, capaces de proporcionar diferentes funciones lógicas booleanas y se propone teóricamente un circuito de recuperación de la señal de reloj utilizando OPLCs. Finalmente, se realiza un estudio …

    upm Repository record for Analysis of Photonic Structures for Optical Networks (opens in a new tab)

  17. Identification of potential groundwater recharge zones: a case study of KwaZulu-Natal, South Africa

    … decision-making (MCDM) technique and Boolean logical approach. The map of groundwater potential zones for Maputaland was prepared by assimilating the 8 thematic layers, i.e., geology, geomorphology, lineament density, soils, slope, rainfall, and land use. Each thematic layer were …

    zulu Repository record for Identification of potential groundwater recharge zones: a case study of KwaZulu-Natal, South Africa (opens in a new tab)

  18. Circuit Design Methods with Emerging Nanotechnologies

    … approaches in the context of conventional CMOS Boolean design cannot be directly employed in the nanoelectronic design process, because the intrinsic electrical characteristics of many nano-devices are not best suited for Boolean implementations but demonstrate strong capability for implementing …

    vt Repository record for Circuit Design Methods with Emerging Nanotechnologies (opens in a new tab)

  19. Level Down: Using Games as a Teaching Tool for Low-Level Computer Science

    … game designed to help students practice their Boolean/bitwise logic operations; this game was evaluated through a large two-group, pre-test post-test survey. Overall, this thesis contributes to a promising area of research that has been relatively unexplored in related literature.

    calgary Repository record for Level Down: Using Games as a Teaching Tool for Low-Level Computer Science (opens in a new tab)