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Showing 1 to 20 of 69 for “"Asics"”.

  1. ASICS para dispositivos médicos implantables

    En este trabajo se estudiará el desarrollo de circuitos integrados en la mayoría de los casos específicos para una aplicación médica implantable, tecnología CMOS de 0.6μm estándar y HV sobre waffer de SOI. El trabajo contiene algunas contribuciones originales obtenidas del trabajo con circuitos …

    uns-ar Repository record for ASICS para dispositivos médicos implantables (opens in a new tab)

  2. HASICs: Investigating hyperspecialized ASICs for neural network inference

    Submission published under a 24 month embargo labeled 'U of I Access', the embargo will last until 2026-08-01

    uiuc Repository record for HASICs: Investigating hyperspecialized ASICs for neural network inference (opens in a new tab)

  3. Wire delay models for global placement of ASICs

    A new model for the propagation delay between two logic gates for timing-driven global placement is proposed. The model is a function of the number of pins on the net, the half perimeter of the bounding box enclosing the net, and the half perimeter of the bounding box enclosing the driving pin and …

    mit Repository record for Wire delay models for global placement of ASICs (opens in a new tab)

  4. Entwicklung eines ASICs in Hochspannungstechnologie zur kombinatorischen Microarray - Peptidsynthese

    … beschreibt diese Arbeit die Entwicklung eines ASICs in Hochspannungs-CMOS-Technologie, der als Träger für ein solches Peptid-Microarray nutzbar ist. Geladene Partikel, die Aminosäuren oder andere Monomere enthalten können, werden im vom Chip erzeugten elektrischen Feld ortsselektiv auf der …

    heid-thes Repository record for Entwicklung eines ASICs in Hochspannungstechnologie zur kombinatorischen Microarray - Peptidsynthese (opens in a new tab)

  5. Functional testing of ASICs designed with hardware description languages

    Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.

    mit Repository record for Functional testing of ASICs designed with hardware description languages (opens in a new tab)

  6. High-Performance CMOS Front-End ASICs for SiPM Detectors and High-Frequency Ultrasound and Photoacoustic Imaging

    Silicon photomultiplier (SiPM), as a high sensitivity photon detector, has been widely used in high energy physics, positron emission tomography imaging, and light detection and ranging applications. The slow-rising edge of standard SiPM signal, however, makes the timing measurement sensitive to …

    houston Repository record for High-Performance CMOS Front-End ASICs for SiPM Detectors and High-Frequency Ultrasound and Photoacoustic Imaging (opens in a new tab)

  7. Evaluation of the performance of coherent optical communications commercial DSP ASICs in low earth orbit radiation environments

    … (DSP) application specific integrated circuits (ASICs) for coherent optical communications systems, first developed in 2008 with current capabilities of over 100 Gbps for commercial terrestrial applications, are a key technology needed for space-based applications. However, in order to develop …

    mit Repository record for Evaluation of the performance of coherent optical communications commercial DSP ASICs in low earth orbit radiation environments (opens in a new tab)

  8. ACID-SENSING ION CHANNELS: TARGETS FOR NEUROPEPTIDE MODULATION AND NEURONAL DAMAGE

    Acid-sensing ion channels (ASICs) are proton-gated channels expressed in neurons in the central and peripheral nervous systems. These ion channels are sensors for extracellular pH and contribute to a variety of normal functions including learning and memory, seizure termination, fear, anxiety, and …

    ohiolink Repository record for ACID-SENSING ION CHANNELS: TARGETS FOR NEUROPEPTIDE MODULATION AND NEURONAL DAMAGE (opens in a new tab)

  9. Implementação de um sistema de síntese de alto nível baseado em modelos java

    … uma metodologia para a geração automática de ASICs, em VHDL, a partir da linguagem de entrada Java. Como linguagem de especificação adotou-se a Linguagem Java por esta possuir características desejáveis para especificação a nível de sistema, como: orientação a objetos, portabilidade e …

    brazil-ufrgs Repository record for Implementação de um sistema de síntese de alto nível baseado em modelos java (opens in a new tab)

  10. The Design, Simulation and Synthesis of Pipelined Floating-Point Radix-4 Fast Fourier Transform Data Path in VHDL

    … have begun to consider alternatives such as ASICs and Field Programmable Gate Arrays (FPGA). Although ASICs can provide excellent performance and efficiency, the time, cost and risk associated with the design of ASICs is leading developers towards FPGAs. A number of significant advances in …

    temple Repository record for The Design, Simulation and Synthesis of Pipelined Floating-Point Radix-4 Fast Fourier Transform Data Path in VHDL (opens in a new tab)

  11. A Reconfigurable FPGA Overlay Architecture for Matrix-Matrix Multiplication

    … Both application-specific integrated circuits (ASICs), and field-programmable arrays (FPGAs) are used for this purpose. However, a trade-off between the two platforms is that ASICs provide little flexibility after they are manufactured while designs on FPGAs are flexible but application …

    wustl Repository record for A Reconfigurable FPGA Overlay Architecture for Matrix-Matrix Multiplication (opens in a new tab)

  12. Modeling and Synthesis with SystemC

    … of Application Specific Integrated Circuits (ASICs), System-On-a-Chip (SoC) design seems to be the current chip design paradigm. Unlike ASICs, SoCs are a potpourri of diverse components, including general-purpose or special-purpose processors. Designing and testing these designs require a new …

    vt Repository record for Modeling and Synthesis with SystemC (opens in a new tab)

  13. Softcore stream processor for FPGA-based DSP / Peng Wang

    … on Application Specific Integrated Circuits (ASICs) for the sake of performance and energy efficiency. However, ASICs have long design cycle and the fabrication cost associated with ASICs can be millions of dollars, further, ASICs are designed for a specific application making them difficult …

    qu-belfast Repository record for Softcore stream processor for FPGA-based DSP / Peng Wang (opens in a new tab)

  14. Design and Implementation of an FPGA-based Partially Reconfigurable Network Controller

    … using Application Specific Integrated Circuits (ASICs) or Field Programmable Gate Arrays (FPGAs) is more suitable. One of the features of FPGAs that cannot be integrated into ASICs is runtime reconfiguration in which, certain portions of the chip are reconfigured at runtime while the other parts …

    vt Repository record for Design and Implementation of an FPGA-based Partially Reconfigurable Network Controller (opens in a new tab)

  15. EARLY PERFORMANCE PREDICTION METHODOLOGY FOR MANY-CORES ON CHIP BASED APPLICATIONS

    … application-specific integrated circuits (ASICs) that comprises of many cores. Performance for these applications depends mainly on latency of interconnects which transfer data between cores that implement applications by distributing tasks. Time-to-market is a critical consideration while …

    syracuse-diss Repository record for EARLY PERFORMANCE PREDICTION METHODOLOGY FOR MANY-CORES ON CHIP BASED APPLICATIONS (opens in a new tab)

  16. Engineering Scalable Quantum Systems From First-Principles to Large-Scale Control

    … with application specific integrated circuit (ASICs) will be demonstrated. The ASICs provides multiplexed control signals and increased control field efficiency, thus decreasing both the wiring complexity and thermal load per qubit. This work will thus pave the way to color center-based devices …

    mit Repository record for Engineering Scalable Quantum Systems From First-Principles to Large-Scale Control (opens in a new tab)

  17. Object-oriented hardwarespecification and design with a language extension to VHDL

    … anwendungsspezifischer integrierter Schaltungen (ASICs) analysiert, die sich durch den Entwurf und den Einsatz einer objektorientierten Spracherweiterung zur Hardwarebeschreibungssprache VHDL ergeben. Die Analyse befaßt sich mit der Modellierung von Vererbung, Verteiltheit, Nebenläufigkeit, …

    oldenburg Repository record for Object-oriented hardwarespecification and design with a language extension to VHDL (opens in a new tab)

  18. Approximation of CPU code using neural networks

    … application specific integrated circuits (ASICs). Most consumer CPUs are general purpose and come with mature development tools used by large communities of programmers, while ASICs can perform very specific tasks very efficiently at the expense of ease-of-use and flexibility. Other devices …

    uiuc Repository record for Approximation of CPU code using neural networks (opens in a new tab)

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