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Showing 1 to 20 of 23 for “"Application specific integrated circuit (ASIC)"”.

  1. The adoption of Application Specific Integrated Circuit (ASIC) technology by the UK manufacturing base

    … conclusions it has been necessary to:- • Define Application Specific Integrated Circuit (ASIC) technology and review its history • Review that nature of the UK SME base and identify why they should use ASICs • Review the UK, European and World ASIC markets • Analyse the nature of the UK ASIC

    the-open-u Repository record for The adoption of Application Specific Integrated Circuit (ASIC) technology by the UK manufacturing base (opens in a new tab)

  2. Trajectory Sensor and Readout Electronics of a Cosmic Dust Telescope

    An Application Specific Integrated Circuit (ASIC) is developed for the processing of electrostatic signals from a trajectory sensor for cosmic dust. The detector is assembled of multiple wire electrodes which allow the determination of direction, speed and charge of cosmic dust. The circuit

    heid-diss Repository record for Trajectory Sensor and Readout Electronics of a Cosmic Dust Telescope (opens in a new tab)

  3. Improving Field-Programmable Gate Array Scaling Through Wire Emulation

    … and performance, they continue to lag behind application specific integrated circuit (ASIC) performance and power consumption. As manufacturing technology improves and IC feature size decreases, FPGAs may further lag behind ASICs due to interconnection scalability issues. To improve FPGA …

    vt Repository record for Improving Field-Programmable Gate Array Scaling Through Wire Emulation (opens in a new tab)

  4. Extensible Real-Time Sensor and Test Interface for a System-on-Chip

    … thesis describes the development of a printed circuit board (PCB) that enables connecting external sensors and a host computer to a custom Application-Specific Integrated Circuit (ASIC). The ASIC, previously developed by the Low-Energy Autonomy and Navigation research group, is designed for …

    mit Repository record for Extensible Real-Time Sensor and Test Interface for a System-on-Chip (opens in a new tab)

  5. Investigation of Non-Traditional Applications of the Physical Level in Reconfigurable Computing

    … of Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) design processes to enable additional research avenues. In order to accomplish these projects, Tools for Open Reconfigurable Computing (TORC) is utilized to provide a robust environment for circuit

    vt Repository record for Investigation of Non-Traditional Applications of the Physical Level in Reconfigurable Computing (opens in a new tab)

  6. A low dispersion 2-GHz comparator

    … discipline is being met on the many pins of the integrated circuit. As the error in the comparator is lowered, the VLSI production yield is greatly increased because of greater certainty of the measurements. The comparator described within is designed to test a variety of CMOS logic levels at the …

    mit Repository record for A low dispersion 2-GHz comparator (opens in a new tab)

  7. Commercialization of microelectromechanical systems (MEMS)

    … that employ the processes developed in the integrated circuit (IC) and semiconductor industries to construct electro- mechanical devices. In the case of Microopticelectromechanical systems (MOEMS), optical elements are also integrated into these devices. MEMS technology holds the promise of …

    mit Repository record for Commercialization of microelectromechanical systems (MEMS) (opens in a new tab)

  8. FPGA Prototyping Framework on ARROW SoCKit Board with Xillybus Interface and Standard FIFO

    … or in device re-spins as in the case of application-specific integrated circuit (ASIC) designs. Furthermore, a system-on-chip (SoC) architecture that integrates traditional processors with FPGA fabrics enables a hybrid reconfigurable architecture that the FPGA may be re-purposed as needed …

    houston Repository record for FPGA Prototyping Framework on ARROW SoCKit Board with Xillybus Interface and Standard FIFO (opens in a new tab)

  9. Circuit design for logic automata

    … a "pick-and-place" design flow for fast ALA circuit layout. The work flow gracefully aligns the description of computer programs and circuit realizations, providing a simpler and more scalable solution for Application Specific Integrated Circuit (ASIC) designs, which are currently limited by …

    mit Repository record for Circuit design for logic automata (opens in a new tab)

  10. Asic Design of RF Energy Harvester Using 0.13UM CMOS Technology

    … batteries. The energy harvesting amplifier circuit is designed in Global Foundry 0.13um CMOS technology using Cadence integrated circuit design tools. This Application Specific Integrated Circuit (ASIC) is intended to have as small a footprint as possible so that it can be easily integrated

    calpoly Repository record for Asic Design of RF Energy Harvester Using 0.13UM CMOS Technology (opens in a new tab)

  11. Energy efficient links and routers for multi-processor computer systems

    … routers and interconnection networks using an Application Specific Integrated Circuit (ASIC) flow in a commercially available IBM 90nm process technology. This thesis shows that multiplexer routers are more area and power efficient compared to matrix routers since matrix routers quickly exhibit …

    mit Repository record for Energy efficient links and routers for multi-processor computer systems (opens in a new tab)

  12. Hardware support for real-time network security and packet classification using field programmable gate arrays

    … inspection of the packet header fields and is basically a multi-dimensional matching problem. Any matching in software is very slow in comparison to current network speeds. Also, both of these problems need a solution which is scalable and can work at high speeds. Due to the high complexity of …

    njit Repository record for Hardware support for real-time network security and packet classification using field programmable gate arrays (opens in a new tab)

  13. Algorithm and Hardware Co-optimization for Image Segmentation in Wearable Ultrasound Devices: Continuous Bladder Monitoring

    … and an energy-efficient all-parameters-on-chip application-specific integrated circuit (ASIC) for accurate bladder region segmentation and urine volume calculation. U-Net is the state-of-the artneural network (NN) for biomedical image segmentation [1]. We trained two binarized models with 4-bits …

    mit Repository record for Algorithm and Hardware Co-optimization for Image Segmentation in Wearable Ultrasound Devices: Continuous Bladder Monitoring (opens in a new tab)

  14. Simulation of an Implementation and Evaluation of the Layered Radio Architecture

    … sacrifices that must be made when moving an application from an Application Specific Integrated Circuit (ASIC) to a general purpose processor or a digital signal processor, it is feared that reprogrammable processing solutions may not suffice for the emerging wireless protocols, which would …

    vt Repository record for Simulation of an Implementation and Evaluation of the Layered Radio Architecture (opens in a new tab)

  15. Distributed Reconfigurable Simulation for Communication Systems

    … In addition, they are more flexible than Application Specific Integrated Circuit (ASIC) devices. This fast yet flexible property of reconfigurable devices can be used for the simulation of communication systems. However, although reconfigurable devices are more flexible than ASIC devices, …

    vt Repository record for Distributed Reconfigurable Simulation for Communication Systems (opens in a new tab)

  16. Preliminary evaluation of X-ray fluorescence imaging and ultra-high resolution CdTe PET: the progression toward broader spectrum multi-modality tools for small animal neuroscientific investigation

    … with discussion directly focused on neurological applications. The two independent experimental systems were evaluated for proof of concept in order establish the potential viability of imaging small transgenic animals. The first modality, a benchtop XFET system, used an incident monochromatic …

    uiuc Repository record for Preliminary evaluation of X-ray fluorescence imaging and ultra-high resolution CdTe PET: the progression toward broader spectrum multi-modality tools for small animal neuroscientific investigation (opens in a new tab)

  17. System-on-chip-based radiation imaging system with pulse shape discrimination capability

    … security, safeguards, and non-proliferation applications, remain an unexplored technology as several technological challenges have prevented their adoption. These systems utilize large, dual-ended detector arrays for position sensitivity and advanced electronics capable of handling the …

    uiuc Repository record for System-on-chip-based radiation imaging system with pulse shape discrimination capability (opens in a new tab)

  18. In-sensor information processing for resource-limited platforms on flexible epidermal substrates

    … kernels drives the demand for biomedical circuits, with optimized performance and cost. A large class of these healthcare applications require digital signal processing algorithms to be implemented with strict resources, such as energy and silicon area. Shrinking technology nodes produce …

    uiuc Repository record for In-sensor information processing for resource-limited platforms on flexible epidermal substrates (opens in a new tab)

  19. Domain-specific accelerators using optically-addressed phase change memory

    … this demand, researchers have developed domain-specific accelerators (DSAs) for various applications, including machine learning (ML), combinatorial optimization, and fully homomorphic encryption (FHE). However, traditional electronic accelerators face significant challenges in both performance …

    bu Repository record for Domain-specific accelerators using optically-addressed phase change memory (opens in a new tab)

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