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Full chip modeling for predictive simulation of charged device model electrostatic discharge events

Shukla, Vrashank G.University of Illinois at Urbana-Champaign2010

… the roles of the package, power clamp placement, anti-parallel diode placement and decoupling capacitors in determining the amount of stress at the internal I/O circuits. This thesis will also provide design recommendations for preventing CDM failures in the internal I/O circuits.

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