Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 14 of 14 for “"ASIC design"”.
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Asic Design of RF Energy Harvester Using 0.13UM CMOS Technology
… or cumbersome.</p> <p>This thesis proposes a design of an RF energy harvesting device able to charge commercially available thin film or solid-state batteries. The energy harvesting amplifier circuit is designed in Global Foundry 0.13um CMOS technology using Cadence integrated circuit design …
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Partitioning of large HDL ASIC designs into multiple FPGA devices for prototyping and verification
The ASIC (Application specific Integrated Circuit) designs grow continuously bigger and bigger. This causes dramatic increase in the simulation run time. It is very hard to simulate these designs because the simulation time has risen from hours to days and weeks. Hardware Embedded Simulation (HES) …
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Implementing IS-95, the CDMA standard, on TMS320C6201 DSP
… produced by Qualcomm. Texas Instruments (TI) has ASIC design for Viterbi Decoder on C54x. Several of the components in the forward link process are also implemented in hardware. However, having to design a specific hardware for a particular application is expensive and time consuming. Thus, the …
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High level behavioural modelling of boundary scan architecture.
… Scan Test Architecture automatically into an ASIC (Application Specific Integrated Circuit) design. The tool requires the original design (the ASIC) to be described in VHDL-IEEE 1076 Hardware Description Language. The tool consists of the two major elements: i) A parsing and insertion …
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Investigation of Non-Traditional Applications of the Physical Level in Reconfigurable Computing
… and Application Specific Integrated Circuit (ASIC) design processes to enable additional research avenues. In order to accomplish these projects, Tools for Open Reconfigurable Computing (TORC) is utilized to provide a robust environment for circuit analysis and modifications. These projects …
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Designing Low -Power Communication Systems via Noise-Tolerance
… comparison to static and domino circuits. A MAC ASIC design is presented along with the measured results. We investigate the reliability degradation due to leakage in two ∼0.1-mum CMOS technologies. Two performance metrics, unity noise gain (UNG) and four-stage delay, are proposed to quantify …
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Towards Automation of ASIC TSMC 0.18 um Standard Cell Library Development
Cell-based design is a widely adopted design approach in current Application Specific Integrated Circuits (ASIC) and System-on-Chip (SOC) designs. A standard cell library is a collection of basic building blocks that can be used in cell-based design. The use of a standard cell library offers …
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The adoption of Application Specific Integrated Circuit (ASIC) technology by the UK manufacturing base
… Define Application Specific Integrated Circuit (ASIC) technology and review its history • Review that nature of the UK SME base and identify why they should use ASICs • Review the UK, European and World ASIC markets • Analyse the nature of the UK ASIC design and supply industry • Ascertain the …
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Superconducting Asynchronous Logic for Ultra-low Power High Performance Computing
… of the project lies in the modular architecture design that realigns hardware layout with software dataflow to allow for scalable, distributed computing systems from basic circuit building blocks. Projecting the simple circuit design performance to large-scale high performance computing systems, …
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Wormhole Run-Time Reconfiguration: Conceptualization and VLSI Design of a High Performance Computing System
… task. They have lower transistor densities than ASIC solutions, and hence less potential computational power per unit area. Routing overhead generally makes an FPGA solution slower than an ASIC design. Bit-oriented computational units make them unnecessarily inefficient for implementing tasks …
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High-Level Synthesis and Implementation of Built-In Self-Testable Data Path Intensive Circuit
… methods do not render exploration of a large design space, which may result in a local optimum. In this thesis, we present three methods, which aim to address the problem. The first method tries to find a register assignment for each k-test session in a heuristic manner, where k=1,2,…,N and N …
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Sampling architectures for probabilistic inference
… excellent perceived audio quality. A virtual ASIC design shows that this architecture is quite small (less than 10 million gates), and consumes only 70 mW and appears amenable to additional optimization for power. The second application is an enterprise-scale application, topic modeling, which …
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Scalable High-Level Synthesis for AI accelerator design
Submission published under a 24 month embargo labeled 'Closed Access', the embargo will last until 2027-05-01
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Reconfigurable Computing Based on Commercial FPGAs. Solutions for the Design and Implementation of Partially Reconfigurable Systems = Computación reconfigurable basada en FPGAs comerciales. Soluciones para el diseño e implementación de sistemas parcialmente reconfigurables.
… en Application Specific Integrated Circuits (ASICs) que se producen en grandes volúmenes perimiendo amortiza su alto coste de diseño y producción y aprovechando la ventaja del bajo coste por unidad. Por otro lado, los DSPs (Digital Signal Processing) y los microprocesadores han sido preferidos …