Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 6 of 6 for “"28nm cmos"”.
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A 1.7GS/s SAR ADC in 28nm CMOS
… presents a 1.7GS/s 9b single channel SAR ADC in 28nm CMOS technology. The main focus of the thesis is the leveraging of the pipelining, passive residue transfer, and partial interleaving techniques to increase sample rate of the ADC. The first chapter explains the motivation for increasing the …
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Design of residue amplifiers for high-speed pipelined-SAR ADCs
… used in a pipelined-SAR ADC, implemented in a 28nm CMOS process. The proposed design achieves good linearity and low gain variation due to temperature using a constant-gm biasing network. The thesis is organized as follows: Chapter 1 introduces the concepts of ADCs and residue amplification. …
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Adaptive Blocker Cancellation For Wireless Receivers
… in a wireless receiver prototype implemented in 28nm CMOS technology. The measured programmable digital filter provides 34.9dB attenuation of TX leakage and variable attenuation of an additional blocker anywhere in the frequency range 17.5MHz–107.5MHz. The receiver front-end operates at 1.8GHz …
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A continuous-time multi-stage noise-shaping delta-sigma modulator for next generation wireless applications
… As a result, the prototype fabricated in 28nm CMOS achieves DR of 85dB, peak SNDR of 74.9dB, SFDR of 89.3dBc and Schreier FOM of 172.9dB over a 50MHz bandwidth at a 1.8GHz sampling frequency.
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Custom High-Speed ADC for mmWave Digital Beamformers
… for 5G communication system designed in TSMC 28nm CMOS. The overall phased-array system is given along with a breakdown of the ADC’s system functionality with an open-loop 1-bit interleaved comparator and the closed-loop operation of a Delta-Sigma ADC. The clock rate for the implemented chip …
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Design, Characterization and Analysis of Component Level Electrostatic Discharge (ESD) Protection Solutions
… voltage Complementary Metal-Oxide-Semiconductor (CMOS) technologies to meet the requirements of low cost and large scale integration. A new dual-polarity SCR optimized for high bidirectional blocking voltages, high trigger current and low capacitance is realized in a sub 3-V, 180-nm CMOS process. …