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Virginia Polytechnic Institute and State University
Functional level modeling of digital devices
Abstract
dc:description.abstractFunctional level modeling techniques for modeling digital devices that vary in complexity from SSI to LSI are described in this thesis. The vehicle used for modeling is GSP, a general simulation program developed under Dr. J. R. Armstrong at Virginia Tech. These techniques have been used extensively for modeling various devices which include counters, RAMs, ROMs, microprocessor peripheral chips and CPUs. Processors modeled include the Intel 8080, the Zilog Z80 (single chip CPUs) and the Bendix BDX930 (MSI).
Degree
thesis:*- Name thesis:degree_name
- Master of Science
- Level thesis:degree_level
- masters
- Discipline thesis:degree_discipline
- Electrical Engineering
- Department dc:contributor.department
- Electrical Engineering
- Grantor dc:publisher
- Virginia Polytechnic Institute and State University
- Year dc:date.issued
- 1982
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Puthenpurayil, Venugopal
Rights
dc:rights- Statement dc:rights
-
- In Copyright
- Licence dc:rights.uri
- Language dc:language.iso
- en_US
Identifiers
dc:identifier.*- Handle dc:identifier.uri
- http://hdl.handle.net/10919/87252
- OAI identifier oai:identifier
- oai:vtechworks.lib.vt.edu:10919/87252