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Virginia Polytechnic Institute and State University

Tri-state gates in logical networks

Abstract

dc:description.abstract

Several methods were presented to facilitate the use of tri-state gates in the design of logic networks. Special considerations for the use of tri-state gates are discussed in order that the reader might get a feel for the capability of tri-state logic and so that he will be aware of problems which may appear in the course of the design and development of a tri-state logic network. Several problems are worked, both combinational and sequential examples, and the advantages of tri-state over classical logic are discussed. Two additional examples, one of an iterative network and one of a multi-functional cell illustrate the applicability of tri-state gates to many digital designs.

Degree

thesis:*
Name thesis:degree_name
Master of Science
Level thesis:degree_level
masters
Discipline thesis:degree_discipline
Electrical Engineering
Department dc:contributor.department
Electrical Engineering
Grantor dc:publisher
Virginia Polytechnic Institute and State University
Year dc:date.issued
1975

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Aglietti, Robert B.

Rights

dc:rights
Statement dc:rights
  • In Copyright
Language dc:language.iso
en

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/10919/70461
OAI identifier oai:identifier
oai:vtechworks.lib.vt.edu:10919/70461

Chain of custody

source
Harvested from
Virginia Tech
Base URL
vtechworks.lib.vt.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
related terms
citation

Aglietti, Robert B.. Tri-state gates in logical networks. masters thesis, Virginia Polytechnic Institute and State University, 1975. http://hdl.handle.net/10919/70461