On Methodology for Verification, Validation and Uncertainty Quantification in Power Electronic Converters Modeling

This thesis provides insight into quantitative accuracy assessment of the modeling and simulation of power electronic converters. Verification, Validation, and Uncertainty quantification (VVandUQ) provides a means to quantify the disagreement between computational simulation results and experimental results in order to have quantitative comparisons instead of qualitative comparisons. Due to the broad applications of modeling and simulation in power electronics, VVandUQ is used to evaluate the credibility of modeling and simulation results. The topic of VVandUQ needs to be studied exclusively for power electronic converters. To carry out this work, the formal procedure for VVandUQ of power electronic converters is presented. The definition of the fundamental words in the proposed framework is also provided. The accuracy of the switching model of a three-phase Voltage Source Inverter (VSI) is quantitatively assessed following the proposed procedure. Accordingly, this thesis describes the hardware design and development of the switching model of the three-phase VSI.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2014

Author dc:creator

• Rashidi Mehrabadi, Niloofar

Chairs dc:contributor.committeechair

• Boroyevich, Dushan
• Burgos, Rolando

Committee member dc:contributor.committeemember

• Roy, Christopher J.

• power electronic converters
• Uncertainty Quantification (UQ)
• modeling and simulation

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Dc Identifier Other

vt_gsexam:3559

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/50524