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Virginia Tech

Development and VLSI implementation of a new neural net generation method

Abstract

dc:description.abstract

The author begins with a short introduction to current neural network practices and pitfalls including an in depth discussion of the meaning behind the equations. Specifically, a description of the underlying processes involved is given which likens training to the biological process of cell differentiation. Building on these ideas, an improved method of generating integer based binary neural networks is developed. This type of network is particularly useful for the optical character recognition problem, but methods for usage in the more general case are discussed. The new method does not use training as such. Rather, the training data is analyzed to determine the statistically significant relationships therein. These relationships are used to generate a neural network structure that is an idealization of the trained version in that it can accurately extrapolate from existing knowledge by exploiting known relationships in the training data. The paper then turns to the design and testing of a VLSI CMOS chip which was created to utilize the new technique. The chip is based on the MOSIS 2Jlm process using a 2200A x 2200A die that was shaped into a special purpose microprocessor that could be used in any of a number of pattern recognition applications with low power requirements and/or limiting considerations. Simulation results of the methods are then given in which it is shown that error rates of less than 5% for inputs containing up to 30% noise can easily be achieved. Finally, the thesis concludes with ideas on how the various methods described might be improved further.

Degree

thesis:*
Name thesis:degree_name
Master of Science
Level thesis:degree_level
masters
Discipline thesis:degree_discipline
Electrical Engineering
Department dc:contributor.department
Electrical Engineering
Grantor dc:publisher
Virginia Tech
Year dc:date.issued
1993

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Bittner, Ray Albert
Chair dc:contributor.committeechair
  • Conners, Richard W.
Committee members dc:contributor.committeemember
  • Athanas, Peter M.
  • Abbott, A. Lynn

Rights

dc:rights
Statement dc:rights
  • In Copyright
Language dc:language.iso
en

Identifiers

dc:identifier.*
Dc Identifier Other
etd-12042009-020129
OAI identifier oai:identifier
oai:vtechworks.lib.vt.edu:10919/46092

Chain of custody

source
Harvested from
Virginia Tech
Base URL
vtechworks.lib.vt.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
related terms
citation

Bittner, Ray Albert. Development and VLSI implementation of a new neural net generation method. masters thesis, Virginia Tech, 1993. http://hdl.handle.net/10919/46092