Partitioning Methods and Algorithms for Configurable Computing Machines

This thesis addresses the partitioning problem for configurable computing machines. Specifically, this thesis presents algorithms to partition chain-structured task graphs across configurable computing machines. The algorithms give optimal solutions for throughput and total execution time for these problems under constraints on area, pin count, and power consumption. The algorithms provide flexibility for applying these constraints while remaining polynomial in complexity. Proofs of correctness as well as an analysis of runtime complexity are given. Experiments are performed to illustrate the runtime of these algorithms.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical Engineering

Department dc:contributor.department

Electrical Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

1998

Author dc:creator

• Chandrasekhar, Suresh

Chair dc:contributor.committeechair

• Jones, Mark T.

Committee members dc:contributor.committeemember

• Ha, Dong Sam
• Armstrong, James R.

• Partitioning
• CCM
• Field programmable gate arrays
• Algorithm

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Dc Identifier Other

etd-71798-84748

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/36909