High Performance Applications on Reconfigurable Clusters

Many problems faced in the engineering world are computationally intensive. Filtering using FIR (Finite Impulse Response) filters is an example to that. This thesis discusses the implementation of a fast, reconfigurable, and scalable FIR (Finite Impulse Response) digital filter. Constant coefficient multipliers and a Fast FIFO implementation are also discussed in connection with the FIR filter. This filter is used in two of its structures: the direct-form and the lattice structure. The thesis describes several configurations that can be created with the different components available and reports the testing results of these configurations.

Name thesis:degree_name

Master of Science

Level thesis:degree_level

masters

Discipline thesis:degree_discipline

Electrical and Computer Engineering

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Virginia Tech

Year dc:date.issued

2000

Author dc:creator

• Nakad, Zahi Samir

Chair dc:contributor.committeechair

• Jones, Mark T.

Committee members dc:contributor.committeemember

• Athanas, Peter M.
• Armstrong, James R.

• FIR filters
• Field programmable gate arrays
• reconfigurable computing
• constant coefficient multipliers

Statement dc:rights

• In Copyright

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Dc Identifier Other

etd-11132000-12050007

OAI identifier oai:identifier

oai:vtechworks.lib.vt.edu:10919/35682